Re: Cortex-A9 boot problems with d-cache on Zynq

[Alexander Nasonov <alnsn%yandex.ru@localhost>]

Alexander Nasonov wrote:
> The new version of u-boot builds without any problems but it gives me
> too many files and I'm not sure which ones to pick. I followed ikwzm's
> recommendation [1] and I could boot netbsd.bin with 'fatload mmc 0
> 0x100000 netbsd.bin; go 0x100000' but I still don't understand this
> choice of boot files.

If I also copy u-boot.dtb, I can boot netbsd.ub like this:

Zynq> fatload mmc 0 0x100000 netbsd.ub
7118124 bytes read in 406 ms (16.7 MiB/s)

Zynq> fatload mmc 0 0x800000 u-boot.dtb
8524 bytes read in 19 ms (437.5 KiB/s)

Zynq> bootm 0x100000 - 0x800000
## Booting kernel from Legacy Image at 00100000 ...
   Image Name:   NetBSD/zybo 8.99.25
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    7118060 Bytes = 6.8 MiB
   Load Address: 00100000
   Entry Point:  00100000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 00800000
   Booting using the fdt blob at 0x800000
   Loading Kernel Image ... OK
   Loading Device Tree to 1fffa000, end 1ffff14b ... OK

Starting kernel ...


[   1.0000000] uboot arg = 0, 0, 0x1fffa000, 0x214c

[   1.0000000] NetBSD/evbarm (zybo) booting ...
[   1.0000000] [ Kernel symbol table missing! ]
[   1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
[   1.0000000]     2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017,
[   1.0000000]     2018 The NetBSD Foundation, Inc.  All rights reserved.
[   1.0000000] Copyright (c) 1982, 1986, 1989, 1991, 1993
[   1.0000000]     The Regents of the University of California.  All rights reserved.

[   1.0000000] NetBSD 8.99.25 (ZYBO) #0: Mon Oct 29 22:47:42 GMT 2018
[   1.0000000]  alnsn@neva:/home/alnsn/netbsd-current/clean/src/sys/arch/evbarm/compile/obj/ZYBO
[   1.0000000] total memory = 512 MB
[   1.0000000] avail memory = 498 MB
[   1.0000000] timecounter: Timecounters tick every 10.000 msec
[   1.0000000] mainbus0 (root)
[   1.0000000] cpu0 at mainbus0 core 0: 666 MHz Cortex-A9 r3p0 (Cortex V7A core)
[   1.0000000] cpu0: DC enabled IC enabled WB enabled LABT branch prediction enabled
[   1.0000000] cpu0: 32KB/32B 4-way L1 VIPT Instruction cache
[   1.0000000] cpu0: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache
[   1.0000000] cpu0: 512KB/32B 8-way write-back-locking-D L2 PIPT Unified cache
[   1.0000000] vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
[   1.0000000] cpu1 at mainbus0 core 1
[   1.0000000] armperiph0 at mainbus0
[   1.0000000] arml2cc0 at armperiph0: ARM PL310 r3p2 L2 Cache Controller (disabled)
[   1.0000000] arml2cc0: cache enabled
[   1.0000000] armgic0 at armperiph0: Generic Interrupt Controller, 96 sources (85 valid)
[   1.0000000] armgic0: 32 Priorities, 64 SPIs, 5 PPIs, 16 SGIs
[   1.0000000] arma9tmr0 at armperiph0: A9 Global 64-bit Timer (333 MHz)
[   1.0000000] arma9tmr0: interrupting on irq 27
[   1.0000000] axi0 at mainbus0: Advanced eXtensible Interface
[   1.0000000] zynqslcr0 at axi0 addr 0xf8000000: System Level Control Module
[   1.0000000] zynqslcr_dumpclocks
[   1.0000000] REF      :   33 MHz
[   1.0000000] ARM_PLL  : 1333 MHz
[   1.0000000] DDR_PLL  : 1067 MHz
[   1.0000000] IO_PLL   : 1000 MHz
[   1.0000000] CPU_6X4X :  667 MHz
[   1.0000000] CPU_3X2X :  333 MHz
[   1.0000000] CPU_2X   :  222 MHz
[   1.0000000] CPU_1X   :  111 MHz
[   1.0000000] DDR_3X   :  533 MHz
[   1.0000000] DDR_2X   :  356 MHz
[   1.0000000] DDR_DCI  :   10 MHz
[   1.0000000] SMC      :   17 MHz
[   1.0000000] QSPI     :  200 MHz
[   1.0000000] GIGE0    :  125 MHz
[   1.0000000] GIGE1    :   17 MHz
[   1.0000000] SDIO     :   50 MHz
[   1.0000000] UART     :  100 MHz
[   1.0000000] SPI      :   16 MHz
[   1.0000000] CAN      :    8 MHz
[   1.0000000] PCAP     :  200 MHz
[   1.0000000] DBG      :   67 MHz
[   1.0000000] FCLK0    :   50 MHz
[   1.0000000] FCLK1    :   42 MHz
[   1.0000000] FCLK2    :   42 MHz
[   1.0000000] FCLK3    :   42 MHz
[   1.0000000] zynquart0 at axi0 addr 0xe0000000 intr 59
[   1.0000000] zynquart1 at axi0 addr 0xe0001000 intr 82
[   1.0000000] zynquart1: console
[   1.0000000] ehci0 at axi0 addr 0xe0002000 intr 53
[   1.0000000] ehci0: Zynq USB Controller id=5 revision=2 version=2
[   1.0000000] ehci0: HCI revision=0x100
[   1.0000000] ehci0: 1 host port, device capable, 12 endpoints
[   1.0000000] ehci0: ULPI phy VID 0x0424 PID 0x0007
[   1.0000000] ehci0: EHCI version 1.0
[   1.0000000] usb0 at ehci0: USB revision 2.0
[   1.0000000] sdhc0 at axi0 addr 0xe0100000 intr 56: SD/MMC host controller
[   1.0000000] sdhc0: SDHC 2.0, rev 137, PIO, 33333 kHz, embedded slot, HS 3.3V, 512 byte blocks
[   1.0000000] sdmmc0 at sdhc0 slot 0
[   1.0000000] cemac0 at axi0 addr 0xe000b000 intr 54: Cadence Gigabit Ethernet Controller
[   1.0000000] rgephy0 at cemac0 phy 0: RTL8169S/8110S/8211 1000BASE-T media interface, rev. 5
[   1.0000000] rgephy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
[   1.0000000] rgephy1 at cemac0 phy 1: RTL8169S/8110S/8211 1000BASE-T media interface, rev. 5
[   1.0000000] rgephy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
[   1.0000000] ifmedia_match: multiple match for 0x20/0xffffeff, selected instance 0
[   1.0000000] timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
[   1.0000030] timecounter: Timecounter "arma9tmr0" frequency 333333333 Hz quality 500
[   1.0000030] cpu1: 666 MHz Cortex-A9 r3p0 (Cortex V7A core)
[   1.0024085] cpu1: DC enabled IC enabled WB enabled LABT branch prediction enabled
[   1.0124005] cpu1: 32KB/32B 4-way L1 VIPT Instruction cache
[   1.0124005] cpu1: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache
[   1.0224004] cpu1: 512KB/32B 8-way write-back-locking-D L2 PIPT Unified cache
[   1.0224004] vfp1 at cpu1: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
[   1.1423996] uhub0 at usb0: NetBSD (0000) EHCI root hub (0000), class 9/0, rev 2.00/1.00, addr 1
[   1.1524017] uhub0: 1 port with 1 removable, self powered
[   1.1524017] sdhc0: cmd timeout error
[   1.2224030] IPsec: Initialized Security Association Processing.
[   1.2524012] sdmmc0: SD card status: 4-bit, C10, U1
[   1.2524012] ld0 at sdmmc0: <0x02:0x544d:SA16G:0x31:0x27f3ef7d:0x122>
[   1.2624000] ld0: 14832 MB, 7533 cyl, 64 head, 63 sec, 512 bytes/sect x 30375936 sectors
[   1.2725237] ld0: 4-bit width, High-Speed/SDR25, 33.333 MHz

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