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Could use some help debuging PR kern/53261



Hi folks,

we already lost test runs on armv4 some time ago (kernel VA is too tidy,
fixable, but haven't had time to do it yet), and recently also lost
the armv5 test runs due to PR

	kern/53261: kernel crash during test run

I initially thought it would be a gcc bug, but this seems unlikely (or
I just don't see it).

I added even more instrumentation and get (compiled with -O0):

        if (do_syscall_debug)
     6d0:       e59f33d8        ldr     r3, [pc, #984]  ; ab0 <sys_mmap+0x510>
     6d4:       e5933000        ldr     r3, [r3]
     6d8:       e3530000        cmp     r3, #0
     6dc:       0a000002        beq     6ec <sys_mmap+0x14c>
                printf("sys_mmap(uap=%p)\n", uap);
     6e0:       e51b106c        ldr     r1, [fp, #-108] ; 0xffffff94
     6e4:       e59f03d0        ldr     r0, [pc, #976]  ; abc <sys_mmap+0x51c>
     6e8:       ebfffffe        bl      0 <printf>
        pos = SCARG(uap, pos);
     6ec:       e51b306c        ldr     r3, [fp, #-108] ; 0xffffff94
     6f0:       e1c321d8        ldrd    r2, [r3, #24]
     6f4:       e14b25f4        strd    r2, [fp, #-84]  ; 0xffffffac


This prints out the syscall argument record pointer at a properly
aligned address. The address is loaded to r1 here:

	ldr     r1, [fp, #-108]

The printf output is fine (a well aligned address, like ending with 0x....50).

Then a few lines further we try to load a 64bit value from that address+24:

	ldr     r3, [fp, #-108]	;	load the address to r3
	ldrd    r2, [r3, #24] ;		load 64bits to r2/r3 from r3+24

I verified that this variant of ldrd is available on this cpu (works fine
in a userland test).

Interestingly we trap with an unaligned address fault at the original
uap address (r3 as loaded from fp-108) plus 28. So something very
wiered must have happened in between, like something overwriting parts
of the stack, or modifying fp.

The trap seems to be the same even w/o the debuging printf stuff.

Any ideas?

Martin


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