Some diffs for for consideration. What works (after patch): gpio using the gpioctl command. What doesn't yet work: gpio pin interrupts.--- src/sys/arch/evbarm/conf/BEAGLEBONE.old 2014-04-28 11:20:56.000000000 +0100 +++ src/sys/arch/evbarm/conf/BEAGLEBONE 2014-04-28 11:30:18.000000000 +0100
@@ -208,11 +208,17 @@ #options SDHC_DEBUG # General-purpose I/O pins -# XXX These are the GPIO v2 in the AM335x, not v1 as in the OMAP35xx.-#omapgpio0 at obio0 addr 0x44e07000 size 0x1000 intrbase 128 intr 29 -#omapgpio1 at obio0 addr 0x4804c000 size 0x1000 intrbase 160 intr 30 -#omapgpio2 at obio0 addr 0x481ac000 size 0x1000 intrbase 192 intr 32 -#omapgpio3 at obio0 addr 0x481ae000 size 0x1000 intrbase 224 intr 32 +omapgpio0 at obio0 addr 0x44e07000 size 0x1000 intrbase 128 intr 96 +omapgpio1 at obio0 addr 0x4804c000 size 0x1000 intrbase 160 intr 98 +omapgpio2 at obio0 addr 0x481ac000 size 0x1000 intrbase 192 intr 32 +omapgpio3 at obio0 addr 0x481ae000 size 0x1000 intrbase 224 intr 62
+ +# Nail down the ports to specific device files +# +gpio0 at omapgpio0 +gpio1 at omapgpio1 +gpio2 at omapgpio2 +gpio3 at omapgpio3 #gpio* at omapgpio?--- src/sys/arch/arm/omap/omap2_reg.h.old 2014-04-28 11:47:36.000000000 +0100 +++ src/sys/arch/arm/omap/omap2_reg.h 2014-04-28 13:38:45.000000000 +0100
@@ -767,6 +767,46 @@ #define GPIO5_BASE_TI_DM37XX 0x49056000 #define GPIO6_BASE_TI_DM37XX 0x49058000 +#ifdef TI_AM335X +#define GPIO_REVISION 0x000 +#define GPIO_SYSCONFIG 0x010 +#define GPIO_EOI 0x020 +#define GPIO_IRQSTATUS_RAW_0 0x024 +#define GPIO_IRQSTATUS_RAW_1 0x028 +#define GPIO_IRQSTATUS_0 0x02c +#define GPIO_IRQSTATUS_1 0x030 +#define GPIO_IRQSTATUS_SET_0 0x034 +#define GPIO_IRQSTATUS_SET_1 0x038 +#define GPIO_IRQSTATUS_CLR_0 0x03c +#define GPIO_IRQSTATUS_CLR_1 0x040 +#define GPIO_IRQWAKEN_0 0x044 +#define GPIO_IRQWAKEN_1 0x048 +#define GPIO_SYSSTATUS 0x114 +#define GPIO_CTRL 0x130 +#define GPIO_OE 0x134 +#define GPIO_DATAIN 0x138 +#define GPIO_DATAOUT 0x13c +#define GPIO_LEVELDETECT0 0x140 +#define GPIO_LEVELDETECT1 0x144 +#define GPIO_RISINGDETECT 0x148 +#define GPIO_FALLINGDETECT 0x14c +#define GPIO_DEBOUNCENABLE 0x150 +#define GPIO_DEBOUNINGTIME 0x154 +#define GPIO_CLEARDATAOUT 0x190 +#define GPIO_SETDATAOUT 0x194 + +/* + * Translate some register names for generic omap gpio driver + */ + +#define GPIO_IRQSTATUS1 GPIO_IRQSTATUS_0 +#define GPIO_IRQSTATUS2 GPIO_IRQSTATUS_1 + +#define GPIO_SETIRQENABLE1 GPIO_IRQSTATUS_SET_0 +#define GPIO_SETIRQENABLE2 GPIO_IRQSTATUS_SET_1 +#define GPIO_CLEARIRQENABLE1 GPIO_IRQSTATUS_CLR_0 +#define GPIO_CLEARIRQENABLE2 GPIO_IRQSTATUS_CLR_1 +#else #define GPIO_IRQSTATUS1 0x018 #define GPIO_IRQENABLE1 0x01c #define GPIO_WAKEUPENABLE 0x020 @@ -790,6 +830,7 @@ #define GPIO_SETWKUENA 0x084 #define GPIO_CLEARDATAOUT 0x090 #define GPIO_SETDATAOUT 0x094 +#endif /* * I2C--- src/sys/arch/arm/omap/omap2_gpio.c.old 2014-04-28 12:34:42.000000000 +0100 +++ src/sys/arch/arm/omap/omap2_gpio.c 2014-04-29 20:23:43.000000000 +0100
@@ -171,7 +171,7 @@
* Make sure the irq isn't enabled and not asserting.
*/
gpio->gpio_enable_mask &= ~irq_mask;
- GPIO_WRITE(gpio, GPIO_IRQENABLE1, gpio->gpio_enable_mask);
+ GPIO_WRITE(gpio, GPIO_CLEARIRQENABLE1, irq_mask);
GPIO_WRITE(gpio, GPIO_IRQSTATUS1, irq_mask);
/*
@@ -430,6 +430,7 @@
return;
}
+#ifndef TI_AM335X // AM335x gpio interrupts not working
at the moment
if (oa->obio_intrbase != OBIOCF_INTRBASE_DEFAULT) {
gpio->gpio_pic.pic_ops = &gpio_pic_ops;
strlcpy(gpio->gpio_pic.pic_name, device_xname(self),
@@ -443,6 +444,7 @@
KASSERT(gpio->gpio_is != NULL);
aprint_normal(", intr %d", oa->obio_intr);
}
+#endif
aprint_normal("\n");
#if NGPIO > 0
#if 0