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Re: PRCM support for OMAP (beagle cold reset)



Hi! Adam,


From: Adam Hoka <adam.hoka%gmail.com@localhost>
Date: Fri, 27 Aug 2010 09:28:43 +0200

> I have patches to support the PRCM in omap to be able
> to reboot my devkit8000 (beagle clone).
> 
> The only supported action is cold reset in fact, but
> others could be supported too.
> 
> http://www.netbsd.org/~ahoka/patches/omap_prcm.diff
> http://www.netbsd.org/~ahoka/patches/beagle_prcm_reboot.diff
> 
> Im not sure if I have to disable the MMU or something else
> action before reset. Anyone can have a look?
> 
> This could be also useful for overo.

Oh great!
My Overo could reboot.

In my opinion, prcm@obio1 is better than prcm@mainbus.
I did the following configuration.

  # Power, Reset and Clock Management
  prcm*           at obio1 addr 0x48306000 size 0x2000    # PRM Modlue

and attached patch.

Also it is better.  ;-)

  #if NPRCM > 0
      prcm_cold_reset();
  #endif


Thanks,
--
kiyohara
Index: arm/omap/files.omap2
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/files.omap2,v
retrieving revision 1.4
diff -u -r1.4 files.omap2
--- arm/omap/files.omap2        7 Jul 2010 22:53:44 -0000       1.4
+++ arm/omap/files.omap2        28 Aug 2010 08:08:59 -0000
@@ -79,6 +79,11 @@
 attach gpmc at mainbus
 file   arch/arm/omap/omap2_gpmc.c              gpmc
 
+# PRCM interface
+device prcm
+attach prcm at obio
+file   arch/arm/omap/omap2_prcm.c              prcm needs-flag
+
 # OHCI USB controller
 ##attach       ohci at obio with obioohci:             omapgpio
 attach ohci at obio with obioohci
--- arm/omap/omap2_prcm.c.orig  1970-01-01 09:00:00.000000000 +0900
+++ arm/omap/omap2_prcm.c       2010-08-27 22:20:32.000000000 +0900
@@ -0,0 +1,122 @@
+/*     $NetBSD$        */
+
+/*-
+ * Copyright (c) 2010 Adam Hoka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_omap.h"
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD$");
+
+#include <sys/param.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+
+#include <arm/omap/omap_var.h>
+
+#include <arm/omap/omap2_obiovar.h>
+#include <arm/omap/omap2_reg.h>
+#include <arm/omap/omap2_prcm.h>
+
+#include "locators.h"
+
+struct prcm_softc {
+       device_t                sc_dev;
+       bus_space_tag_t         sc_iot;
+       bus_space_handle_t      sc_ioh;
+       bus_addr_t              sc_base;
+       bus_size_t              sc_size;
+};
+
+/* for external access to prcm operations */
+struct prcm_softc *prcm_sc;
+
+/* prototypes */
+static int     prcm_match(device_t, cfdata_t, void *);
+static void    prcm_attach(device_t, device_t, void *);
+
+/* attach structures */
+CFATTACH_DECL_NEW(prcm, sizeof(struct prcm_softc),
+       prcm_match, prcm_attach, NULL, NULL);
+
+static int
+prcm_match(device_t parent, cfdata_t match, void *aux)
+{
+       struct obio_attach_args *obio = aux;
+
+       if (obio->obio_addr != OBIOCF_ADDR_DEFAULT)
+               return 1;
+       return 0;
+}
+
+static void
+prcm_attach(device_t parent, device_t self, void *aux)
+{
+       struct obio_attach_args *obio = aux;
+
+       prcm_sc = device_private(self);
+
+       prcm_sc->sc_dev = self;
+       prcm_sc->sc_iot = &omap_bs_tag;
+
+       prcm_sc->sc_base = obio->obio_addr;
+       prcm_sc->sc_size = OMAP2_PRM_SIZE;
+       
+       /* map i/o space for PRM */
+       if (bus_space_map(prcm_sc->sc_iot, prcm_sc->sc_base, prcm_sc->sc_size,
+           0, &prcm_sc->sc_ioh) != 0) {
+               aprint_error("prcm_attach: can't map i/o space for prm");
+               return;
+       }
+
+       aprint_normal(": Power, Reset and Clock Management\n");
+}
+
+static uint32_t
+prcm_read(bus_addr_t module, bus_addr_t reg)
+{      
+       return bus_space_read_4(prcm_sc->sc_iot, prcm_sc->sc_ioh,
+           module + reg);
+}
+
+static void
+prcm_write(bus_addr_t module, bus_addr_t reg, uint32_t data)
+{      
+       bus_space_write_4(prcm_sc->sc_iot, prcm_sc->sc_ioh,
+           module + reg, data);
+}
+
+void
+prcm_cold_reset()
+{
+       uint32_t val;
+       
+       val = prcm_read(OMAP3430_GR_MOD, OMAP2_RM_RSTCTRL);
+
+       val |= OMAP_RST_DPLL3;
+
+       prcm_write(OMAP3430_GR_MOD, OMAP2_RM_RSTCTRL, val);
+}
--- arm/omap/omap2_prcm.h.orig  1970-01-01 09:00:00.000000000 +0900
+++ arm/omap/omap2_prcm.h       2010-08-27 21:03:19.000000000 +0900
@@ -0,0 +1,34 @@
+/*     $NetBSD$        */
+
+/*-
+ * Copyright (c) 2010 Adam Hoka
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _OMAP2_PRCM_H_
+#define _OMAP2_PRCM_H_
+
+void prcm_cold_reset(void);
+
+#endif
Index: arm/omap/omap2_reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap2_reg.h,v
retrieving revision 1.2
diff -u -r1.2 omap2_reg.h
--- arm/omap/omap2_reg.h        16 Jun 2010 22:06:54 -0000      1.2
+++ arm/omap/omap2_reg.h        28 Aug 2010 08:08:59 -0000
@@ -231,6 +231,51 @@
 
 
 /*
+ * Power Management registers base, offsets, and size
+ */
+#ifdef OMAP_3530
+#define        OMAP2_PRM_BASE                  0x48306000
+#endif
+
+#define OMAP2_PRM_SIZE                 0x00002000 /* 8k */
+
+/* module offsets */
+#define OCP_MOD                0x0800
+#define MPU_MOD                0x0900
+#define CORE_MOD       0x0a00
+#define GFX_MOD                0x0b00
+#define WKUP_MOD       0x0c00
+#define PLL_MOD                0x0d00
+
+/* module offsets specific to chip */
+#define OMAP24XX_GR_MOD                OCP_MOD
+#define OMAP24XX_DSP_MOD       0x1000
+#define OMAP2430_MDM_MOD       0x1400
+#define OMAP3430_IVA2_MOD      0x0000 /* IVA2 before base! */
+#define OMAP3430ES2_SGX_MOD    GFX_MOD
+#define OMAP3430_CCR_MOD       PLL_MOD
+#define OMAP3430_DSS_MOD       0x0e00
+#define OMAP3430_CAM_MOD       0x0f00
+#define OMAP3430_PER_MOD       0x1000
+#define OMAP3430_EMU_MOD       0x1100
+#define OMAP3430_GR_MOD                0x1200
+#define OMAP3430_NEON_MOD      0x1300
+#define OMAP3430ES2_USBHOST_MOD        0x1400
+
+#define OMAP2_RM_RSTCTRL       0x50
+#define OMAP2_RM_RSTTIME       0x54
+#define OMAP2_RM_RSTST         0x58
+#define OMAP2_PM_WKDEP         0xc8
+#define OMAP2_PM_PWSTCTRL      0xe0
+#define OMAP2_PM_PWSTST                0xe4
+#define OMAP2_PM_PREPWSTST     0xe8
+#define OMAP2_PRM_IRQSTATUS    0xf8
+#define OMAP2_PRM_IRQENABLE    0xfc
+
+#define OMAP_RST_DPLL3         __BIT(2)
+#define OMAP_RST_GS            __BIT(1)
+
+/*
  * L3 Interconnect Target Agent Common Registers
  */
 #define OMAP2_TA_GPMC          0x68002400


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