On Dec 14, 2007, at 5:03 PM, Chris Gilbert wrote:

> Hi,
>
> Following on from making cats actually be capable of dumping kernel  
> cores I've updated the kernel code and libkvm code to support  
> dumping the extra headers etc needed for savecore to work.  With  
> some help from Nick (skrll@) I've added support to gdb to  
> understand kernel core dumps.  Nick did the mknative work for gdb.
>
> The updates to dumpsys and kcore.h were taken from similar code in  
> i386.
>
> The asm dumpsys and dodumpsys were inspired by amd64's method of  
> dumping core, as it makes sure that the stack has a switchframe  
> containing the registers, something savectx didn't get right.
>
> These change remove the last active reference to savectx (which  
> didn't work for dumpsys because the switchframe it placed on the  
> stack is trashed by the dumpsys C code before the stack is saved to  
> disk)
>
> I've broken the diffs down into bite sized chunks:
> kernel.diff - changes to the kernel to support dumping the extra  
> info for savecore.  Adds kcore.h.
> pkg_list.diff - adds kcore.h to the arm comp set.
> libkvm.diff - adds support to libkvm to provide the functions it  
> needs to save the core dump (room for optimisation as the L1 table  
> could be cached in memory)
> gdb_mknative.diff - Nick's run of mknative to provide a kvm target  
> for gdb on arm
> gdb_pcb.diff - Adding the processing of the dumppcb structure from  
> the kernel core dump to gdb
>
> The main item to highlight is the cpu_kcore_hdr structure in sys/ 
> arch/arm/include/kcore.h, as it's a new kernel->userland ABI for  
> arm, I'd like to get it right first time if possible.  Currently  
> I've defined it as:
> typedef struct cpu_kcore_hdr {
>    uint32_t    version;        /* structure version */
>    uint32_t    isArm26;        /* indicates arm26 dump */
>    uint32_t    PAKernelL1Table;    /* PA of PMAP_kernel L1 table */

ARMv6 will need two.  Add a PAUserL1Table please.
Also add a UserL1TableSize variable.  If 0, everything is KernelL1Table,
otherwise and any address < UserL1TableSize << 17 is looked up in  
UserL1Table.
Also, we need a flags work for determining whether we are using the
compat or native armv6 page table (since that will effect decoding of  
PTEs).
     uint16_t UserL1TableSize;
     uint16_t flags;
#define	KCORE_ARM_APX		0x0001

>    uint32_t    nmemsegs;        /* Number of RAM segments */
> #if 0
>    phys_ram_seg_t  memsegs[];        /* RAM segments */
> #endif
> } cpu_kcore_hdr_t;
>