Subject: Re: Debugging / SPL-levels / AT91RM9200 success
To: None <email@example.com>
From: Toru Nishimura <firstname.lastname@example.org>
Date: 03/07/2007 09:52:29
>> failing to catch or forgetting interrupt notification with your case.
> The GPIO pin was at high level so I think the interrupt has not
> been totally missed because it's a active low signal in I/O mode.
And, it might be turned out HW limitation, or "feature" which is
not your fault, in the end. Not all SoC is designed perfect. In fact
designers just comb to collect pieces from IP library they do not
understand, and it's SW developer who notice design errors after real
chips are made and delivered on his desk. The most common solution
HW designer do is to remove the broken feature from spec and pretend
it does not exist (I guess many will fall down from their chairs by
Toru Nishimura/ALKYL Technology