Subject: Re: Building for both ARM V4 and ARM V5 systems
To: Richard Earnshaw <Richard.Earnshaw@buzzard.freeserve.co.uk>
From: David Laight <email@example.com>
Date: 08/07/2006 21:37:00
On Sun, Aug 06, 2006 at 11:07:52PM +0100, Richard Earnshaw wrote:
> > But, IIRC, that range of offsets is less for the half-word operations,
> > and gcc is likely to use 32bit operations to read 16bit values (masking
> > the high bits). Even using misaligned transfers for 4n+2 addresses.
> > (or do we disable that in netbsd's versions of gcc?)
> Sorry, you remember incorrectly; at least for V4.
> NetBSD/arm hasn't supported unaligned accesses to half-word memory since
> the ARM port switched to ELF. GCC stopped generating unaligned word
> accesses of any kind on ARM in gcc-3.4. This is to ensure that code built
> for legacy cpus will continue to work correctly on v6 devices which
> support traditional unaligned memory access semantics.
Actually I was using gcc 2.9x.xx for something other than netbsd, and
fell foul when I tried enabling the mis-aligned transfer trap...
David Laight: firstname.lastname@example.org