Subject: Re: Avocent SwitchView IP
To: None <firstname.lastname@example.org>
From: Chris Tribo <email@example.com>
Date: 02/16/2005 18:35:34
On Feb 16, 2005, at 6:25 PM, Robert Swindells wrote:
>> - Xilinx XC2S200 Spartan-II 2.5V field programmable gate array. I'm
>> guessing this chip does image compression and/or encryption so that
>> CPU doesn't have to.
> Another guess would be that this contains a PCI host bridge and
> bus master interface. Intrinsyc (was NMI) have one of these.
> The NIC is a PCI part, you can't just interface it to the CPU directly.
> The PS/2 ports are probably from the FPGA as well.
That would make a lot more sense, the digitizer is a PCI part as well;
and 400 MHz should be plenty to handle image acquisition, compression