Subject: NetBSD netif device driver -- Re: ARM cache
To: Jesse Off <joff@embeddedARM.com>
From: Toru Nishimura <firstname.lastname@example.org>
Date: 01/18/2005 00:52:33
> Indeed. The EP93xx ethernet MAC core was based on a PCI 10/100 MAC from
> Cirrus dubbed the CS8950 that never made it to market.
Interesting to learn...
Now here is the terse description of how to construct netif device driver
in NetBSD way.
Three routines, xxxstart(), xxxreap() and xxxrxintr(), act main roles. xxxstart()
takes off a mbuf from ifnet transmit Q, prepare descriptors (if HW has),
and tell Tx HW it to send. If Tx HW provides a choise for descriptor to emit
interrupt or not, it'd be very helpful to implement "mostly-interrupt-less Tx
algorithm." xxxreap() is to reclaim descriptors and associated mbuf which
are left un-salvaged after transmission. xxxreap() can be an ISR for Tx
interrupt response, or simply called by other places "opportunistically."
xxxrxintr() is Rx ISR. If Rx interrupt was FIFOed, not-emitted-one-by-one
for every frame receiption, ISR load could be smaller.
Toru Nishimura/ALKYL Technolog, a NetBSD company