Subject: Re:-pmap initlialization
To: None <port-arm@netbsd.org>
From: Toru Nishimura <locore64@alkyltechnology.com>
List: port-arm
Date: 01/06/2005 11:55:37
Kamal R. Prasad  asked;

> I notice that the lubbock code in netbsd sets
> the TLB base addr as 0xa01fc000, 

I believe it's the consequence of the way how initarm() prepares
kernel pmap foundation.  2MB - 16KB, bingo.

> but isn't TLB
> base addr something that points to the hardware cache?

- yes, ARM cache is "virtually address indexed, virtual address tagged."
- no, it does not.  MMU hardware pulls up TLB data with physical address.
So, they are never under control of processor cache.

Toru Nishimura/ALKYL Technology