Subject: Re: Race condition in generic soft interrupts code?
To: None <Richard.Earnshaw@arm.com>
From: Naoto Shimazaki <igy@arhc.org>
List: port-arm
Date: 07/19/2003 22:54:29
At Thu, 17 Jul 2003 15:11:27 +0100,
Richard Earnshaw wrote:
> > I think all of lower priority interrupts should masked by ICU hardware
> > before handlers are invoked.  If they masked by hardware,
> > XXX_intr_dispatch is never called by lower interrupts, and the
> > following code become not needed.
> 
> I'm not sure I agree.   It takes quite a few cycles to block interrupts, 
> especially if they are controlled by a memory-mapped device.  If we work 
> on the principle that the a machine spends roughly 1% of the time in 
> interrupt mode and that interrupt sources are statistically independent, 
> then 99 out of every 100 interrupt calls would end up messing 
> unnecessarily with the interrupt masks.  That sounds to me like an 
> overhead that would be good to avoid.  The basic framework does this 
> (modulo this problem under discussion).

I missed your point.  Now I understood.

I'm not sure the implementation that masking interrupt on demand to
prevent to touch hardware if possible really improves the final
performance.  But I feel it might do.

I roughly measured how often happen interrupts which must be masked.

splraise called         14500/sec 
set_intrmask called     17300/sec 
intr count              2700/sec 
masked on demand        19/sec 

splraise() is called about 14500 times per second, interrupts are
happened about 2700 times per second, but I found just 19 lower
priority interrupts are happened during higher priority level.

This is done with my IXP1200 board.  Interrupt source is timer for
hardclock and fxp (Intel 82559 Ethernet).  I sent flooding ping
from another host (ping -n -s 1472 -f 192.168.0.3) to the board.
About 1300 packets/sec are sent and received without any loss.

--
Naoto Shimazaki