Subject: Re: plan to merge cats and netwinder isa_machdep.c
To: Izumi Tsutsui <>
From: Richard Earnshaw <>
List: port-arm
Date: 10/10/2002 16:07:58
> In article <>
> wrote:
> > > Furthermore, _isa_bus_dmamap_sync() does not handle cache coherency
> > > at all, but it should do like arm/arm32/bus_dma.c.
> > 
> > Hmm, interesting.  Then it's a surprise that I get anything even 
> > resembling audio out of my soundblaster ISA card at all.  Though this 
> > would possibly explain some of the break-up.
> In general, data buffers are really large and data cache on SA is
> small (16k), so it would not cause problem so often.
> Buffers of descripters for bus-master devices are usually
> allocated with BUS_DMAMAP_COHERENT, so cache flush is not
> required so strictly (on arm, which handles BUS_DMAMAP_COHERENT).
> Actually, the only problem that was caused by missing cache-flush in
> my experience is fxp(4) driver, which allocates RX descriptors in mbufs.

True, but the other issue (24-bit address space) would mean that I'd 
expect on average for 7/8ths of the buffers to be outside the addressable 
range (I've got 128 Mb of ram).  Yet the failures, though there are far 
less common than that.