Subject: Re: Kernel copyin/out optimizations for ARM...
To: John Clark <email@example.com>
From: Richard Earnshaw <firstname.lastname@example.org>
Date: 03/14/2002 15:19:15
> In the case the ARM for 'fast' transfers, it seems that the use of
> multiple loads per instruction has some potential, and as I read the
> current arm/arm32/bcopyinout.S, there's only a test for 32 bit
> alignment, otherwise byte copy, rather than tests for 64 or 128 bit
> alignments, and using the multiple load ops. (or so, from memory of a
> few days ago...)
ldm doesn't require any more alignment than ldr.