Subject: Re: Kernel copyin/out optimizations for ARM...
To: None <>
From: David Laight <>
List: port-arm
Date: 03/14/2002 13:35:48
> IIRC, the SA will merge writes to a cacheable area anyway.

The document seems to imply that, our hw guy didn't see it happen
though (I didn't ever trace the memory cycles).

I might try to write a 'better' copyin/out.
However I don't have a test system :-)

(I've found a copy of the ARM instruction set - but not the encoding -
on a document on the ARM web site.)


David Laight: