Subject: Re: Kernel copyin/out optimizations for ARM...
To: David Laight <email@example.com>
From: Richard Earnshaw <firstname.lastname@example.org>
Date: 03/14/2002 11:26:29
> > I asked about the address space! Since the code assumes that the L2 PTE
> > array is contiguous.....
> That sounds like a bug.
On reflection, maybe not. IIRC the page tables for the current process
are mapped linearly at PROCESS_PAGE_TBLS_BASE. So they are there in an
single array. What happens if a physical page is missing from that map
and we try to dereference it, I've no idea. I hope we won't end up
mapping one in, just so that we can decide that it doesn't contain a valid