Subject: Re: Kernel copyin/out optimizations for ARM...
From: David Laight <email@example.com>
Date: 03/14/2002 08:06:23
On Thu, Mar 14, 2002 at 01:31:26AM +0000, Richard Earnshaw wrote:
> > >
> > > The PTE check is actually checking for the 'copy on write' case,
> > > not the 'page not present' case. This may have something to do
> > > with the problems Jason? was having with COW on XSCALE.
> > > My guess is that the cpu wasn't faulting the write to cache! Just the
> > > writeback of the cacheline - which would be asynchonous!
> > Further thoughts:
> > 1) if this check is needed here, presuambly there are equivalent
> > problems for COW for writes from user space?
> I think the code is written the way it is because the ARM pte mappings
> require that user-read => kernel-write. However, ldrt would solve that
Ah! that would make sense - I'm doing this from memory, I didn't steal
the ARM book from my last employer :-(
> > 2) is address space reserved for PTE entries for the entire user
> > address space?
> yes and no. L1 space is allocated (4 pages), but L2 space is only
> allocated if there are mappings in that region.
I asked about the address space! Since the code assumes that the L2 PTE
array is contiguous.....
I'm going to have to get started on the netbsd port to the sa1100
system I've got on my desk here. Trouble is I've got to do a
bootloader first - I can copy a file to memory....
David Laight: firstname.lastname@example.org