Subject: Re: Shark kernels no-longer boot
To: None <Richard.Earnshaw@arm.com, port-arm@netbsd.org>
From: Jason R Thorpe <thorpej@wasabisystems.com>
List: port-arm
Date: 02/05/2002 10:33:22
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On Mon, Feb 04, 2002 at 10:26:54PM -0800, Jason R Thorpe wrote:

 > The Shark port relies on the fact that the FIQ vector is indirect
 > like the IRQ vector.  This should take about 10 minutes to fix.

Ok, I just committed the following which fixes the problem.

-- 
        -- Jason R. Thorpe <thorpej@wasabisystems.com>

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? arm32/arm32-diff
? arm32/compile/SHAG-SHARK
? arm32/compile/SHARK
? arm32/conf/SHAG-SHARK
? dnard/compile/GENERIC
Index: arm/arm/fiq.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/arm/arm/fiq.c,v
retrieving revision 1.3
diff -c -r1.3 fiq.c
*** arm/arm/fiq.c	2002/01/25 19:19:24	1.3
--- arm/arm/fiq.c	2002/02/05 18:19:01
***************
*** 62,72 ****
   * fiq_installhandler:
   *
   *	Actually install the FIQ handler down at the FIQ vector.
   */
  static void
  fiq_installhandler(void *func, size_t size)
  {
! #ifdef __PROG32
  	extern void zero_page_readwrite(void);	/* XXX */
  	extern void zero_page_readonly(void);	/* XXX */
  
--- 62,77 ----
   * fiq_installhandler:
   *
   *	Actually install the FIQ handler down at the FIQ vector.
+  *
+  *	Note: If the FIQ is invoked via an extra layer of
+  *	indirection, the actual FIQ code store lives in the
+  *	data segment, so there is no need to manipulate
+  *	the vector page's protection.
   */
  static void
  fiq_installhandler(void *func, size_t size)
  {
! #if defined(__PROG32) && !defined(__ARM_FIQ_INDIRECT)
  	extern void zero_page_readwrite(void);	/* XXX */
  	extern void zero_page_readonly(void);	/* XXX */
  
***************
*** 76,82 ****
--- 81,89 ----
  	memcpy(fiqvector, func, size);
  
  #ifdef __PROG32
+ #if !defined(__ARM_FIQ_INDIRECT)
  	zero_page_readonly();
+ #endif
  	cpu_icache_sync_range((vaddr_t) fiqvector, size);
  #endif
  }
Index: arm/arm/vectors.S
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/arm/arm/vectors.S,v
retrieving revision 1.1
diff -c -r1.1 vectors.S
*** arm/arm/vectors.S	2001/12/20 01:20:22	1.1
--- arm/arm/vectors.S	2002/02/05 18:19:02
***************
*** 55,64 ****
--- 55,68 ----
  	ldr	pc, Ldata_abort_target
  	ldr	pc, Laddress_exception_target
  	ldr	pc, Lirq_target
+ #ifdef __ARM_FIQ_INDIRECT
+ 	ldr	pc, Lfiq_target
+ #else
  Lfiqvector:
  	.set	_C_LABEL(fiqvector), . - _C_LABEL(page0)
  	subs	pc, lr, #4
  	.org	Lfiqvector + 0x100
+ #endif
  
  Lreset_target:
  	.word	reset_entry
***************
*** 80,83 ****
--- 84,100 ----
  
  Lirq_target:
  	.word	irq_entry
+ 
+ #ifdef __ARM_FIQ_INDIRECT
+ Lfiq_target:
+ 	.word	_C_LABEL(fiqvector)
+ #endif
  _C_LABEL(page0_end):
+ 
+ #ifdef __ARM_FIQ_INDIRECT
+ 	.data
+ 	.align	0
+ _C_LABEL(fiqvector):
+ 	subs	pc, lr, #4
+ 	.org	_C_LABEL(fiqvector) + 0x100
+ #endif
Index: arm/arm32/genassym.cf
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/arm/arm32/genassym.cf,v
retrieving revision 1.9
diff -c -r1.9 genassym.cf
*** arm/arm32/genassym.cf	2002/01/25 19:19:25	1.9
--- arm/arm32/genassym.cf	2002/02/05 18:19:05
***************
*** 51,56 ****
--- 51,59 ----
  include <machine/vmparam.h>
  
  define	__PROG32		1
+ ifdef __ARM_FIQ_INDIRECT
+ define	__ARM_FIQ_INDIRECT	1
+ endif
  
  define	VM_MIN_ADDRESS		VM_MIN_ADDRESS
  define	VM_MAXUSER_ADDRESS	VM_MAXUSER_ADDRESS
Index: arm32/include/types.h
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/arm32/include/types.h,v
retrieving revision 1.16
diff -c -r1.16 types.h
*** arm32/include/types.h	2001/11/22 18:00:01	1.16
--- arm32/include/types.h	2002/02/05 18:19:07
***************
*** 5,10 ****
--- 5,13 ----
  
  #include <arm/arm32/types.h>
  
+ /* We need to invoke FIQs indirectly. */
+ #define	__ARM_FIQ_INDIRECT
+ 
  #define __HAVE_DEVICE_REGISTER
  #define __HAVE_NWSCONS
  
Index: dnard/include/types.h
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/dnard/include/types.h,v
retrieving revision 1.2
diff -c -r1.2 types.h
*** dnard/include/types.h	2001/11/22 18:00:01	1.2
--- dnard/include/types.h	2002/02/05 18:19:08
***************
*** 5,10 ****
--- 5,13 ----
  
  #include <arm/arm32/types.h>
  
+ /* We need to invoke FIQs indirectly. */ 
+ #define	__ARM_FIQ_INDIRECT
+ 
  #define __HAVE_DEVICE_REGISTER
  #define __HAVE_NWSCONS
  

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