Subject: Re: ARM exception handlers -- question
To: , <>
From: David Laight <>
List: port-arm
Date: 11/09/2001 13:08:21

I don't know netbsd (yet) but do know unix internals (mainly SVR4/Unixware)
and have worked on ARM cpus...

> In particular, the PUSHFRAMEINSVC is a little confusing.  The comment
> above it states that it should not be used if the CPU is already in SVC
> mode -- but the CPU *IS* in SVC mode when I take my Data Abort.
> The PUSHFRAMEINSVC macro specifically stores USR_sp and USR_lr on
> the stack:
>         stmia   r0, {r13-r14}^;         /* Push the user mode registers */

Don't try:  stmia r0!,{...}^  it is 'undefined' - probably writes to the
user r0 on some cpu.
> Obviously, I want to be storing SVC_sp and SVC_lr (which should be no
> problem in a fixed fault handler, since this op is done after switing
> from ABT mode to SVC mode).
> Now, my real question is -- how on EARTH does copyin()/copyout() work?
> Those routines are going to be called while already in SVC mode, and it's
> possible to take a Data Abort in those routines (to fault in the user
> page.

It is possible that these copies could be done in user mode (enable 'user'
access to the kernel pages and return to user, undo everything at the end),
alternatively the kernel could explicitly check the user page is resident.

Mind you being able to fault in 'kernel' data areas is quite handy, Unixware
does it for the symbol table used to load device drivers (got me very confused).

Taking the trap is, of course, easiest...

> I'll note that the way Linux handles this problem is pretty clever -- it
> uses a table, indexed by the SPSR mode bits, to select which stack frame
> pushing method is used.

You certainly need to behave differently dpending on the SPRS mode,
also worth detecting the 'double exception' conditions here.

>  If people agree that Data Abort handling while
> in SVC mode is indeed broken, I'll take a look at fixing our trap handlers
> in a similar way.

You might expect that exceptions would only happen in USER and SVC modes.
However check the priority rules very carefully - since 2 (or more)
exceptions can happen 'at the same time'.  Can you get a 'data abort' due
to non-existant hardare for a write?  It would be asynchronous....
> BTW, I have to say that the arm26 exception handlers are a lot cleaner,
> easier to read... I'd like for us to have a common set of handlers based
> on the arm26 versions, eventually.

Don't think you can, the arm26 model is simpler - I think that is why they
hid the status bits in the PC...