Richard Earnshaw <rearnsha@buzzard.freeserve.co.uk> writes:

> > 
> > Could someone bear with another question from me, and elucidate the
> > reasoning behind and layout of the PROCESS_PAGE_TBLS_BASE area (or has
> > its origin been lost in the midst of time, marked "here be dragons")?
> > 
> 
> OK, let me see what I can remember (I'm doing this at least partly
> for my own benefit).

Once again I am happily impressed by the cluefulness and and general
lets help a newbie esprit of the NetBSD/arm crew. :-) Thanks Richard
(and Chris for his explanation)!

> Each process has, as part of its layout a complete mapping of its
> own page tables.  This allows the kernel to update the map for a
> process which faults for some reason without having to go look for
> the page tables for that process.

> It also has a complete mapping of the kernel page tables, so that
> the kernel can run from the process tables without having to do a
> tlb switch (very expensive with a VAC, still quite expensive witout
> one).

[...]

> The page tables live immediately below KVM and enough space has to
> be left to map the entire 4GB address space using 4k pages and 4
> bytes per page table entry (this is PAGE_TABLE_SPACE) and hence they
> live at PAGE_TABLE_SPACE_START; PROCESS_PAGE_TBLS_BASE is just an
> alias for this address.  This address space will then contain level2
> mappings for any page so mapped: the relevent page table entry for
> any page with a second-level mapping will be a simple offset into
> this address space based on the page size and the size of each
> mapping.  With 4k pages, the total size of this space is 4MB.

Right, now I get it. Thanks!

(It might be nice to stuff this explanation in a comment somewhere)

[...]

-- 

	http://ape.n3.net