Subject: Re: query on timing of some asm
To: Ben Harris <email@example.com>
From: Richard Earnshaw <firstname.lastname@example.org>
Date: 04/10/2001 21:16:43
> It's processor-dependent to some extent, since not all ARMs have clever
> load-delay handling, so the LDR will always stall on old ones. On the
> other hand, you're right that they take the same time to execute a MOV as
> not to execute it, so your suggestion has zero net effect there.
Note however, that StrongARM and Xscale both take N cycles to *not*
execute an N-register ldm/stm instruction, due to the way these
instructions are expanded in the pipeline.
ARM10 can also take more than one cycle to not execute some instructions
(though nothing as bad as the LDM case above).
Hence conditional return statements can suddenly become *very* expensive
on some arm chips...