Subject: Re: kernels on RISCserver 2000
To: None <dhop@nwlink.com>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: port-arc
Date: 03/08/2003 12:19:16
Hi, thank you for your report.

In article <3E67CE12.90904@nwlink.com>
dhop@nwlink.com wrote:

> oosiop0 at jazzio0 addr 0xe0002000 intr 4: NCR53C700-66 rev 0, 50MHz, SCSI ID 7
> scsibus0 at oosiop0: 8 targets, 8 luns per target
> oosiop1 at jazzio0 addr 0xe0003000 intr 5
> 
> *hangs after the '5'*

According to your arcdiag output, it seems R94 does not have
the secondary SCSI. Would you please try newer one?
http://www.ceres.dti.ne.jp/~tsutsui/netbsd/netbsd-arc-RAMDISK-20030307.ecoff.gz


Index: arch/arc/arc/p_nec_r94.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arc/arc/p_nec_r94.c,v
retrieving revision 1.2
diff -u -r1.2 p_nec_r94.c
--- arch/arc/arc/p_nec_r94.c	2002/11/30 14:38:06	1.2
+++ arch/arc/arc/p_nec_r94.c	2003/03/08 03:16:48
@@ -31,8 +31,11 @@
 #include <machine/autoconf.h>
 #include <machine/platform.h>
 
+#include <arc/jazz/rd94.h>
 #include <arc/jazz/jazziovar.h>
 
+void p_nec_r94_init(void);
+
 struct platform platform_nec_r94 = {
 	"NEC-R94",
 	"NEC W&S",
@@ -42,8 +45,39 @@
 	200, /* MHz ?? */
 	c_jazz_eisa_mainbusdevs,
 	platform_generic_match,
-	c_nec_eisa_init,
+	p_nec_r94_init,
 	c_jazz_eisa_cons_init,
 	jazzio_reset,
 	c_nec_jazz_set_intr,
 };
+
+/*
+ * jazzio bus configuration
+ */
+struct pica_dev nec_r94_cpu[] = {
+	{{ "timer",	-1, 0, },	(void *)RD94_SYS_IT_VALUE, },
+	{{ "dallas_rtc", -1, 0, },	(void *)RD94_SYS_CLOCK, },
+	{{ "LPT1",	0, 0, },	(void *)RD94_SYS_PAR1, },
+	{{ "I82077",	1, 0, },	(void *)RD94_SYS_FLOPPY, },
+	{{ "AD1848",	2, 0, },	(void *)RD94_SYS_SOUND,},
+	{{ "SONIC",	3, 0, },	(void *)RD94_SYS_SONIC, },
+	{{ "NCRC700",	4, 0, },	(void *)RD94_SYS_SCSI0, },
+	{{ "I8742",	6, 0, },	(void *)RD94_SYS_KBD, },
+	{{ "pms",	7, 0, },	(void *)RD94_SYS_KBD, }, /* XXX */
+	{{ "COM1",	8, 0, },	(void *)RD94_SYS_COM1, },
+	{{ "COM2",	9, 0, },	(void *)RD94_SYS_COM2, },
+	{{ NULL,	-1, 0, },	(void *)NULL, },
+};
+
+/*
+ * critical i/o space, interrupt, and other chipset related initialization.
+ */
+void
+p_nec_r94_init()
+{
+
+	c_nec_eisa_init();
+
+	/* chipset-dependent jazzio bus configuration */
+	jazzio_devconfig = nec_r94_cpu;
+}

---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp