Subject: Re: PCI memory space mapping on RD94/JC94
To: None <soda@sra.co.jp>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: port-arc
Date: 06/20/2001 23:07:15
In article <200106200639.PAA22283@srapc342.sra.co.jp>
soda@sra.co.jp writes:
> Although I don't have access to PCI based machines, I thought
> at least TGA driver could access memory mapped space. Couldn't it?
TGA is working on JC94, but it does not use pci_mapreg_map()
but bus_space_map(). I'm not familiar with the PCI spec, though...
> What is the value of the base address register?
> (e.g. pci_conf_read(pa->pa_pc, pa->pa_tag, 0x14) for siop case)
A kernel with options PCI_CONFIG_DUMP says:
---
siop0 at pci0 dev 4 function 0: PCI configuration registers:
Common header:
0x00: 0x000f1000 0x02000007 0x01000003 0x0000f800
Vendor Name: Symbios Logic (0x1000)
Device Name: 53c875/876 (0x000f)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0200
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: mass storage (0x01)
Subclass Name: SCSI (0x00)
Interface: 0x00
Revision ID: 0x03
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0xf8
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00100001 0x10040000 0x10041000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x10040001 0x00000000 0x00000000 0x40110100
Base address register at 0x10
type: 32-bit i/o
base: 0x00100000, size: 0x00000100
Base address register at 0x14
type: 32-bit nonprefetchable memory
base: 0x10040000, size: 0x00000100
Base address register at 0x18
type: 32-bit nonprefetchable memory
base: 0x10041000, size: 0x00001000
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x10040001
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x40
Minimum Grant: 0x11
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x00
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x000000c0 0x0f000000 0x00000000 0x0a080080
0x90: 0x00000000 0xffffff00 0x3031f000 0x00000000
0xa0: 0x04000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x0f700000 0x00000000 0x000000f7
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x9c08b421 0x5e3445d5 0xcf158821 0xfe458bf5
0xf0: 0x893517a5 0x8fd6f7fd 0x62928010 0xbb39a7f5
Don't know how to pretty-print device-dependent header.
Symbios Logic 53c875/876 (SCSI mass storage, revision 0x03) at ? dev 4 function 0 (tag 0x80002000, intrtag 0x80002000, intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks): Symbios Logic 53c875 (ultra-wide scsi)
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp