Re: amd64 panic in FPU (Xen and bare-metal)

[Manuel Bouyer <bouyer%antioche.eu.org@localhost>]

On Sun, Jun 21, 2020 at 03:51:07PM +0200, Maxime Villard wrote:
> your assert is not correct, you put the check after sti

Ha yes, I knew I missed something :)
With the check before STI it doens't fire any more on bare metal, or
Xen PVH.
It still does on Xen PV.
Hum, maybe there's a place where interrupts are not disabled as they should be
in the PV case.  Still investigating ...

-- 
Manuel Bouyer <bouyer%antioche.eu.org@localhost>
     NetBSD: 26 ans d'experience feront toujours la difference
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