Hello Joerg,

Does the following excerpt from your dmesg mean that each PCI slot has
its own bridge (and its own bandwidth) or am I being overly
optimistic?  :-)

- Andy Ball

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pci0 at mainbus0 bus 0: configuration mode 1
pci0: i/o space, memory space enabled, rd/line, rd/mult, wr/inv ok
pchb0 at pci0 dev 0 function 0
pchb0: VIA Technologies product 0x0282 (rev. 0x00)
pchb1 at pci0 dev 0 function 1
pchb1: VIA Technologies product 0x1282 (rev. 0x00)
pchb2 at pci0 dev 0 function 2
pchb2: VIA Technologies product 0x2282 (rev. 0x00)
pchb3 at pci0 dev 0 function 3
pchb3: VIA Technologies product 0x3282 (rev. 0x00)
pchb4 at pci0 dev 0 function 4
pchb4: VIA Technologies product 0x4282 (rev. 0x00)
pchb5 at pci0 dev 0 function 7
pchb5: VIA Technologies product 0x7282 (rev. 0x00)
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