On Wed, Jun 16, 2004 at 02:28:42PM +0200, Klaus Klein wrote:
> I was asked to clarify: I agree that with its new location in
> memory it's unlikely that the IDT gets overwritten there as well;
> however, the problem still prevail with the change applied.

Ok, so.. the IDT doesn't get messed up, I think that can be safely
assumed.

It kind of puzzles me what's going then.

The only reason I know for a CPU reset is a triple fault. Which occurs
if a trap occurs while handling a trap, and then the double fault
can't be handled either.

Usually this is a sign of a messed up stack or IDT (both things the
CPU accesses when it handles a trap). But, this doesn't seem to be
the case.

I wonder what it is.. maybe the GDT. Or something outside the CPU
altogether.

- Frank