Subject: Re: intlock
To: Simon Burge <>
From: Frank van der Linden <>
List: port-amd64
Date: 02/29/2004 12:21:30
On Sun, Feb 29, 2004 at 06:04:16PM +1100, Simon Burge wrote:
> I've got a dual xeon here what has a couple of devices on irq 11:
> 	auich0: interrupting at ioapic0 pin 17 (irq 11)
> 	ehci0: interrupting at ioapic0 pin 23 (irq 11) 
> 	uhci0: interrupting at ioapic0 pin 16 (irq 11) 
> 	wm0: interrupting at ioapic2 pin 6 (irq 11)
> Should these have been put on separate irqs then?

The irq is meaningless when using ioapic mode, it is just the value
that would have been used when legacy pic mode. The interrupts
are not shared, they are handled on different lines and/or at
a different ioapic.

I should probably remove the irq part from the output altogether,
people seem to find it confusing (and I can see why).

- Frank