pavel@NetBSD.org wrote:

> > If each CPU has PLL to multiply base clock, each PLL has
> > an internal oscillator which is controlled by comparing against
> > base clock with feedback loop. They are almost syncronized but
> > not precisely, so could have a few tolerance, I think.
> 
> What would be the maximum difference?

I guess it's about 100~1000 ppm, but there is no evidence about it.

> > Anyway, current kern_microtime.c based code also has the similar
> > sync code in the clock interrupt. (see alpha/interrupt.c)
> 
> Sure, this comment applies also to current situation. It would be
> interesting to disable the synchronization in the current code and see if
> it makes any difference.

I don't think syncronization on each tick is needed,
but it might be required per some period.

BTW, do CPUs on x86 SMP have independent clocks?
---
Izumi Tsutsui