While playing with the interrupt code I uncovered a weird problem.
The clock interrupt handler is sometimes running at splsoftclock()
on the primary CPU. This is due to softintr handling in hardclock().
It seems however that the clock interrupt is not reenabled until
after all softintr *and* device intr processing is completed and we
return to PALcode. This causes clock interrupts to be missed.

After applying this hack, the machine(as4100) keeps time well,
even during raidframe parity rewrites. Not more annoying NTP sync
errors in /var/log/messages.

+++ kern_clock.c    17 Aug 2006 17:59:48 -0000
@@ -882,12 +882,17 @@
      * relatively high clock interrupt priority any longer than necessary.
      */
     if (callout_hardclock()) {
+#ifndef alpha
         if (CLKF_BASEPRI(frame)) {
+#else
+               if (0) {
+#endif

The problem exists on uniprocessor, but gets a lot worse on MP.
I suspect this is due to IPIs being fired all the time.

Any chance to get a fix (not this ugly one) pulled up to netbsd-4?

-Tobias
--
timecounters on alpha coming soon.