On Fri, May 16, 2003 at 01:18:19AM -0700, Francis. Javier Mesa wrote:
> Also note that the PII is actually a risc core. The CISC instructions are
> actually broken down into RISC subinstructions, which it almos behave
> like microcode really... but with risc instructions as the microcode. So
> that whole decoding into smoller RISC instructionlets also presents a
> significan overhead.

afaik, there is little or no difference between microcode and uops. do
microcoded cisc cpus use some sort of state machine to execute the
instructions, vs a modern x86 chip breaking down x86 ops into many fixed
size uops?

-- 
Tom Vier <tmv@comcast.net>
DSA Key ID 0xE6CB97DA