Subject: Re: Problems with Promise IDE controllers (and a solution!)
To: None <thorpej@zembu.com>
From: Nathan J. Williams <nathanw@MIT.EDU>
List: port-alpha
Date: 10/11/2000 19:30:58
Jason R Thorpe <thorpej@zembu.com> writes:

> On Wed, Oct 11, 2000 at 06:06:00PM -0400, Nathan J. Williams wrote:
> 
>  > For what it's worth, this problem (PCI devices which ignore the top 16
>  > bits of their BAR) also occurs with the original Ensoniq AudioPCI (the
>  > 1370 chip, not the 1371 or any of the 137x in the SoundBlaster product
>  > line). Unfortunately, it's also been blessed in the PCI 2.2 spec as an
>  > OK thing to do. So, according to the current PCI spec, this is really
>  > a bug in the SRM :(
> 
> Is there ANY way for software to detect chips that do this?!

Sure, a variant on the BAR-sizing code that we have in
pci_subr.c:pci_conf_print_bar(). Write all-ones to the BAR, and when
we read back the value, check if the upper 16 bits are zero.
The cards do do the full 32-bit I/O address decode, they just don't
let you change the upper 16 bits of the address.*

Ideally this would be part of some general PCI-configuring pass, which
I think we've had blue-sky discussions about before.

        - Nathan

* I have to imagine that both the silicon savings and design savings
  accomplished by this brain-damage is.... miniscule, or even
  negative, since PCI chipset templates probably just have a generic
  BARs and address decoder template to include on the die.