Subject: Re: PC164 memory bus speeed (was: pciide performance on alpha)
To: None <>
From: Simon Burge <>
List: port-alpha
Date: 11/04/1999 10:40:05
Simon Burge wrote:

> [[ memory speed vs. compiler choice ]]

I've tried my little benchmark compiled a few different ways (these are
"best of two" results) on a PC164/500MHz/8 SIMMS:

 A:  25.830u 0.259s 0:26.22 99.4%    0+0k 0+110io 2pf+0w
 B:  25.287u 0.186s 0:25.57 99.5%    0+0k 0+110io 25pf+0w
 C:  25.050u 0.168s 0:25.32 99.5%    0+0k 0+110io 25pf+0w

A: Compiled on NetBSD current, using egcs 1.1.2 with
	gcc -O3 -mcpu=21164a -Wa,-m21164a -mmemory-latency=main -fsched-interblock -fsched-spec -fsched-spec-load -fbranch-count-reg
B: Compiled on DU 4.0, using DEC C V5.6-071 with
	cc -arch ev56 -fast -tune ev56 -non_shared
C: Compiled on DU 4.0, using DEC C V5.6-071 with
	cc -arch ev5 -fast -tune ev5 -non_shared

There appears to be nothing in the DEC C compiler man page about
memory latency settings.  Also, there's the same three binaries on a
PC164/500MHz with only 4 SIMMS:

 A:  32.608u 0.318s 0:35.31 93.2%    0+0k 0+110io 2pf+0w
 B:  30.726u 0.356s 0:33.40 93.0%    0+0k 0+110io 0pf+0w
 C:  31.420u 0.317s 0:34.44 92.1%    0+0k 0+110io 25pf+0w

At this stage, switching to the DEC compiler doesn't seem to have made a
large difference.  Are the above compiler options more or less correct?