On Wed, 15 Sep 1999 01:07:42 -0700 (PDT) 
 Todd Whitesel <toddpw@best.com> wrote:

 > Which Alpha systems are you thinking of here? I know that at least the
 > AXPvme boards have lots of distinct interrupt mask bits, and the PALcode
 > uses them to simulate real numbered interrupt levels.

All of them.  Yes, you have specified "this vector is interrupting"
by the PALcode on all of them, but:

#define splnet()                _splraise(ALPHA_PSL_IPL_IO)
#define splbio()                _splraise(ALPHA_PSL_IPL_IO)
#define splimp()                _splraise(ALPHA_PSL_IPL_IO)
#define spltty()                _splraise(ALPHA_PSL_IPL_IO)
#define splserial()             _splraise(ALPHA_PSL_IPL_IO)

That's because the PALcode only provides one "level" for I/O devices, in
terms of the PSL.

        -- Jason R. Thorpe <thorpej@nas.nasa.gov>