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Update Yosys from YosysHQ to the latest version.
Module Name: pkgsrc-wip
Committed By: Lloyd Parkes <lloyd%must-have-coffee.gen.nz@localhost>
Pushed By: lloyd
Date: Sat Oct 29 14:10:42 2022 +1300
Changeset: 08764e0434468309441aaea3d0e7f69f7418c4b4
Modified Files:
yosys/Makefile
yosys/PLIST
yosys/distinfo
Added Files:
yosys/options.mk
yosys/patches/patch-libs_fst_fstapi.cc
yosys/patches/patch-tests_sim_run-test.sh
Log Message:
Update Yosys from YosysHQ to the latest version.
To see a diff of this commit:
https://wip.pkgsrc.org/cgi-bin/gitweb.cgi?p=pkgsrc-wip.git;a=commitdiff;h=08764e0434468309441aaea3d0e7f69f7418c4b4
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
diffstat:
yosys/Makefile | 23 ++++++----
yosys/PLIST | 71 +++++++++++++++----------------
yosys/distinfo | 8 ++--
yosys/options.mk | 34 +++++++++++++++
yosys/patches/patch-libs_fst_fstapi.cc | 22 ++++++++++
yosys/patches/patch-tests_sim_run-test.sh | 15 +++++++
6 files changed, 126 insertions(+), 47 deletions(-)
diffs:
diff --git a/yosys/Makefile b/yosys/Makefile
index c8e1b1da82..55cc1d0d4a 100644
--- a/yosys/Makefile
+++ b/yosys/Makefile
@@ -2,7 +2,7 @@
GITHUB_PROJECT= yosys
GITHUB_TAG= refs/tags/${DISTNAME}
-DISTNAME= yosys-0.12
+DISTNAME= yosys-0.22
CATEGORIES= devel
MASTER_SITES= ${MASTER_SITE_GITHUB:=YosysHQ/}
@@ -12,20 +12,24 @@ COMMENT= Framework for Verilog RTL synthesis
LICENSE= isc
USE_LANGUAGES+= c c++
-USE_TOOLS+= gmake pkg-config bison gawk flex
+USE_TOOLS+= gmake pkg-config bison gawk flex bash:test
PYTHON_VERSIONS_INCOMPATIBLE= 27
# PKGCONFIG_CONFIG= ${PKG_CONFIG:Q}
WRKSRC= ${WRKDIR}/yosys-${DISTNAME}
+TEST_TARGET= test
+
+REPLACE_SH+= tests/svinterfaces/runone.sh
+REPLACE_SH+= tests/svinterfaces/run_simple.sh
SUBST_CLASSES+= python3
SUBST_MESSAGE.python3= Fixing non-shellbang references to python3.
SUBST_STAGE.python3= pre-configure
SUBST_SED.python3= -e 's,python3,${PYTHONBIN},g'
SUBST_FILES.python3+= Makefile
-SUBST_FILES.python3+= techlibs/gowin/Makefile.inc
SUBST_FILES.python3+= tests/bram/run-test.sh
SUBST_FILES.python3+= tests/fsm/run-test.sh
+SUBST_FILES.python3+= tests/memlib/run-test.sh
SUBST_FILES.python3+= tests/opt_share/run-test.sh
SUBST_FILES.python3+= tests/realmath/run-test.sh
SUBST_FILES.python3+= tests/rpc/exec.ys
@@ -40,12 +44,7 @@ SUBST_FILES.python= backends/edif/runtest.py
SUBST_FILES.python+= backends/smt2/smtbmc.py
SUBST_FILES.python+= passes/pmgen/pmgen.py
SUBST_FILES.python+= techlibs/common/cellhelp.py
-SUBST_FILES.python+= techlibs/ecp5/brams_connect.py
-SUBST_FILES.python+= techlibs/ecp5/brams_init.py
-SUBST_FILES.python+= techlibs/gowin/brams_init.py
-SUBST_FILES.python+= techlibs/ice40/brams_init.py
SUBST_FILES.python+= techlibs/nexus/cells_xtra.py
-SUBST_FILES.python+= techlibs/xilinx/brams_init.py
SUBST_FILES.python+= techlibs/xilinx/cells_xtra.py
SUBST_FILES.python+= tests/bram/generate.py
SUBST_FILES.python+= tests/fsm/generate.py
@@ -56,10 +55,18 @@ SUBST_FILES.python+= tests/tools/txt2tikztiming.py
.include "../../mk/bsd.prefs.mk"
+.include "options.mk"
+
.if ${OPSYS} != "Linux"
BUILDLINK_TRANSFORM= rm:-ldl
.endif
+do-configure:
+ ${RUN} ${ECHO} 'CONFIG := ${YOSYS_CONFIG}' > ${WRKSRC}/Makefile.conf
+
+.if ${YOSYS_CONFIG} == "clang"
+.include "../../lang/clang/buildlink3.mk"
+.endif
.include "../../lang/python/pyversion.mk"
.include "../../lang/tcl/buildlink3.mk"
.include "../../devel/readline/buildlink3.mk"
diff --git a/yosys/PLIST b/yosys/PLIST
index 36acc7376b..3c812d2e0b 100644
--- a/yosys/PLIST
+++ b/yosys/PLIST
@@ -14,7 +14,6 @@ share/yosys/anlogic/arith_map.v
share/yosys/anlogic/cells_map.v
share/yosys/anlogic/cells_sim.v
share/yosys/anlogic/eagle_bb.v
-share/yosys/anlogic/lutram_init_16x4.vh
share/yosys/anlogic/lutrams.txt
share/yosys/anlogic/lutrams_map.v
share/yosys/cells.lib
@@ -27,14 +26,6 @@ share/yosys/coolrunner2/tff_extract.v
share/yosys/coolrunner2/xc2_dff.lib
share/yosys/dff2ff.v
share/yosys/ecp5/arith_map.v
-share/yosys/ecp5/bram_conn_1.vh
-share/yosys/ecp5/bram_conn_18.vh
-share/yosys/ecp5/bram_conn_2.vh
-share/yosys/ecp5/bram_conn_36.vh
-share/yosys/ecp5/bram_conn_4.vh
-share/yosys/ecp5/bram_conn_9.vh
-share/yosys/ecp5/bram_init_1_2_4.vh
-share/yosys/ecp5/bram_init_9_18_36.vh
share/yosys/ecp5/brams.txt
share/yosys/ecp5/brams_map.v
share/yosys/ecp5/cells_bb.v
@@ -65,9 +56,7 @@ share/yosys/gatemate/mul_map.v
share/yosys/gatemate/mux_map.v
share/yosys/gatemate/reg_map.v
share/yosys/gowin/arith_map.v
-share/yosys/gowin/bram_init_16.vh
share/yosys/gowin/brams.txt
-share/yosys/gowin/brams_init3.vh
share/yosys/gowin/brams_map.v
share/yosys/gowin/cells_map.v
share/yosys/gowin/cells_sim.v
@@ -84,9 +73,6 @@ share/yosys/greenpak4/gp_dff.lib
share/yosys/ice40/abc9_model.v
share/yosys/ice40/arith_map.v
share/yosys/ice40/brams.txt
-share/yosys/ice40/brams_init1.vh
-share/yosys/ice40/brams_init2.vh
-share/yosys/ice40/brams_init3.vh
share/yosys/ice40/brams_map.v
share/yosys/ice40/cells_map.v
share/yosys/ice40/cells_sim.v
@@ -164,7 +150,6 @@ share/yosys/machxo2/cells_sim.v
share/yosys/mul2dsp.v
share/yosys/nexus/arith_map.v
share/yosys/nexus/brams.txt
-share/yosys/nexus/brams_init.vh
share/yosys/nexus/brams_map.v
share/yosys/nexus/cells_map.v
share/yosys/nexus/cells_sim.v
@@ -172,7 +157,6 @@ share/yosys/nexus/cells_xtra.v
share/yosys/nexus/dsp_map.v
share/yosys/nexus/latches_map.v
share/yosys/nexus/lrams.txt
-share/yosys/nexus/lrams_init.vh
share/yosys/nexus/lrams_map.v
share/yosys/nexus/lutrams.txt
share/yosys/nexus/lutrams_map.v
@@ -197,36 +181,51 @@ share/yosys/simlib.v
share/yosys/techmap.v
share/yosys/xilinx/abc9_model.v
share/yosys/xilinx/arith_map.v
-share/yosys/xilinx/brams_init_16.vh
-share/yosys/xilinx/brams_init_18.vh
-share/yosys/xilinx/brams_init_32.vh
-share/yosys/xilinx/brams_init_36.vh
-share/yosys/xilinx/brams_init_8.vh
-share/yosys/xilinx/brams_init_9.vh
share/yosys/xilinx/cells_map.v
share/yosys/xilinx/cells_sim.v
share/yosys/xilinx/cells_xtra.v
share/yosys/xilinx/ff_map.v
-share/yosys/xilinx/lut4_lutrams.txt
-share/yosys/xilinx/lut6_lutrams.txt
share/yosys/xilinx/lut_map.v
-share/yosys/xilinx/lutrams_map.v
share/yosys/xilinx/mux_map.v
-share/yosys/xilinx/xc2v_brams.txt
-share/yosys/xilinx/xc2v_brams_map.v
share/yosys/xilinx/xc3s_mult_map.v
-share/yosys/xilinx/xc3sa_brams.txt
-share/yosys/xilinx/xc3sda_brams.txt
share/yosys/xilinx/xc3sda_dsp_map.v
share/yosys/xilinx/xc4v_dsp_map.v
share/yosys/xilinx/xc5v_dsp_map.v
-share/yosys/xilinx/xc6s_brams.txt
-share/yosys/xilinx/xc6s_brams_map.v
share/yosys/xilinx/xc6s_dsp_map.v
-share/yosys/xilinx/xc7_brams_map.v
share/yosys/xilinx/xc7_dsp_map.v
-share/yosys/xilinx/xc7_xcu_brams.txt
-share/yosys/xilinx/xcu_brams_map.v
share/yosys/xilinx/xcu_dsp_map.v
-share/yosys/xilinx/xcup_urams.txt
-share/yosys/xilinx/xcup_urams_map.v
+bin/yosys-witness
+share/yosys/anlogic/brams.txt
+share/yosys/anlogic/brams_map.v
+share/yosys/gatemate/inv_map.v
+share/yosys/gatemate/lut_tree_cells.genlib
+share/yosys/gatemate/lut_tree_map.v
+share/yosys/ice40/spram.txt
+share/yosys/ice40/spram_map.v
+share/yosys/include/kernel/fstdata.h
+share/yosys/include/libs/fst/fstapi.h
+share/yosys/intel_alm/common/bram_m10k_map.v
+share/yosys/machxo2/brams.txt
+share/yosys/machxo2/brams_map.v
+share/yosys/machxo2/lutrams.txt
+share/yosys/machxo2/lutrams_map.v
+share/yosys/python3/ywio.py
+share/yosys/xilinx/brams_defs.vh
+share/yosys/xilinx/brams_xc2v.txt
+share/yosys/xilinx/brams_xc2v_map.v
+share/yosys/xilinx/brams_xc3sda.txt
+share/yosys/xilinx/brams_xc3sda_map.v
+share/yosys/xilinx/brams_xc4v.txt
+share/yosys/xilinx/brams_xc4v_map.v
+share/yosys/xilinx/brams_xc5v_map.v
+share/yosys/xilinx/brams_xc6v_map.v
+share/yosys/xilinx/brams_xcu_map.v
+share/yosys/xilinx/brams_xcv.txt
+share/yosys/xilinx/brams_xcv_map.v
+share/yosys/xilinx/lutrams_xc5v.txt
+share/yosys/xilinx/lutrams_xc5v_map.v
+share/yosys/xilinx/lutrams_xcu.txt
+share/yosys/xilinx/lutrams_xcv.txt
+share/yosys/xilinx/lutrams_xcv_map.v
+share/yosys/xilinx/urams.txt
+share/yosys/xilinx/urams_map.v
diff --git a/yosys/distinfo b/yosys/distinfo
index 95b1992c43..69e402c814 100644
--- a/yosys/distinfo
+++ b/yosys/distinfo
@@ -1,6 +1,8 @@
$NetBSD$
-BLAKE2s (yosys-0.12.tar.gz) = d9b850db3619ce0cb3a9d0e5a15a2cc0aa51bce5c01320a193062e99fadc4f64
-SHA512 (yosys-0.12.tar.gz) = df91ea75ae08c7c7e134cfa6284c4e9349e6f85f2df32e4710a571176d5e1a334a6e1e77d52bf573686d33b405559e40af1a8d42cbd4e1f95f0e3b4e212e0b06
-Size (yosys-0.12.tar.gz) = 2060970 bytes
+BLAKE2s (yosys-0.22.tar.gz) = 4983725a68e89f2e5dbc341beb5deba28906c6ca84ecfe8deae1dba1fbb69ff7
+SHA512 (yosys-0.22.tar.gz) = d546196a6875b0ecaaab44437b5691f08890576eed357ac99dce233a0afd352a56742f5286da406e4e5513be32db99811fc6caa7a7a605a94af3903670fbf616
+Size (yosys-0.22.tar.gz) = 2362180 bytes
SHA1 (patch-kernel_yosys.cc) = 81e504f0a61baa47eca7cec021ae60d8ed432e3b
+SHA1 (patch-libs_fst_fstapi.cc) = 3be81ba51fc67b4578f956513dc5e3c531c7240d
+SHA1 (patch-tests_sim_run-test.sh) = 9f8149dcb024ab93f723ed0f85dd88a58168bf62
diff --git a/yosys/options.mk b/yosys/options.mk
new file mode 100644
index 0000000000..c5d128cce8
--- /dev/null
+++ b/yosys/options.mk
@@ -0,0 +1,34 @@
+# $NetBSD$
+
+PKG_OPTIONS_VAR= PKG_OPTIONS.yosys
+
+PKG_OPTIONS_REQUIRED_GROUPS= compiler
+PKG_OPTIONS_GROUP.compiler= gcc clang
+
+PKG_SUGGESTED_OPTIONS= clang
+
+# On NetBSD only clang allows Yosys to pass its self tests.
+.if ${OPSYS} == "NetBSD"
+PKG_SUGGESTED_OPTIONS= clang
+.else
+PKG_SUGGESTED_OPTIONS= gcc
+.endif
+
+.include "../../mk/bsd.options.mk"
+
+###
+### Use clang to build Yosys
+###
+.if !empty(PKG_OPTIONS:Mclang)
+YOSYS_CONFIG= clang
+BUILD_DEPENDS+= clang-[0-9]*:../../lang/clang
+PKGSRC_COMPILER= clang
+.endif
+
+###
+### Use GCC to build Yosys
+###
+.if !empty(PKG_OPTIONS:Mgcc)
+YOSYS_CONFIG= gcc
+GCC_REQD+= 4.8.1
+.endif
diff --git a/yosys/patches/patch-libs_fst_fstapi.cc b/yosys/patches/patch-libs_fst_fstapi.cc
new file mode 100644
index 0000000000..8c45175f72
--- /dev/null
+++ b/yosys/patches/patch-libs_fst_fstapi.cc
@@ -0,0 +1,22 @@
+$NetBSD$
+
+support NetBSD
+
+--- libs/fst/fstapi.cc.orig
++++ libs/fst/fstapi.cc
+@@ -3607,6 +3607,7 @@ static int fstReaderRecreateHierFile(struct fstReaderContext *xc)
+ fflush(xc->f);
+ #endif
+ zfd = dup(fileno(xc->f));
++ lseek(zfd, ftell(xc->f), SEEK_SET);
+ zhandle = gzdopen(zfd, "rb");
+ if (!zhandle) {
+ close(zfd);
+@@ -4272,6 +4273,7 @@ int fstReaderInit(struct fstReaderContext *xc)
+ #endif
+
+ zfd = dup(fileno(xc->f));
++ lseek(zfd, ftell(xc->f), SEEK_SET);
+ zhandle = gzdopen(zfd, "rb");
+ if (zhandle) {
+ for (offpnt = 0; offpnt < uclen; offpnt += FST_GZIO_LEN) {
diff --git a/yosys/patches/patch-tests_sim_run-test.sh b/yosys/patches/patch-tests_sim_run-test.sh
new file mode 100644
index 0000000000..19141b128a
--- /dev/null
+++ b/yosys/patches/patch-tests_sim_run-test.sh
@@ -0,0 +1,15 @@
+$NetBSD$
+
+Avoid a Linux specific invocation of basename.
+
+--- tests/sim/run-test.sh
++++ tests/sim/run-test.sh
+@@ -3,7 +3,7 @@ set -eu
+ source ../gen-tests-makefile.sh
+ echo "Generate FST for sim models"
+ find tb/* -name tb*.v | while read name; do
+- test_name=$(basename -s .v $name)
++ test_name=$(basename $name .v)
+ echo "Test $test_name"
+ verilog_name=${test_name:3}.v
+ iverilog -o tb/$test_name.out $name $verilog_name
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