CVS commit: pkgsrc/cad/iverilog

["Makoto Fujiwara" <mef%netbsd.org@localhost>]

Module Name:    pkgsrc
Committed By:   mef
Date:           Sat May 18 14:49:59 UTC 2024

Modified Files:
        pkgsrc/cad/iverilog: Makefile

Log Message:
(cad/iverilog) Fix build, adjust WRKSRC


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 pkgsrc/cad/iverilog/Makefile

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/cad/iverilog/Makefile
diff -u pkgsrc/cad/iverilog/Makefile:1.2 pkgsrc/cad/iverilog/Makefile:1.3
--- pkgsrc/cad/iverilog/Makefile:1.2    Sun May  5 22:34:01 2024
+++ pkgsrc/cad/iverilog/Makefile        Sat May 18 14:49:59 2024
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.2 2024/05/05 22:34:01 wiz Exp $
+# $NetBSD: Makefile,v 1.3 2024/05/18 14:49:59 mef Exp $
 
 DISTNAME=      verilog-10.1.1
 # There is confision in naming of this software, use iverilog as it's saner
@@ -13,6 +13,7 @@ COMMENT=      Verilog simulation and synthesi
 LICENSE=       gnu-gpl-v2
 
 USE_LANGUAGES= c c++
+WRKSRC=                ${WRKDIR}/${DISTNAME}
 
 GNU_CONFIGURE=         yes
 USE_TOOLS+=            gmake bison lex