CVS commit: pkgsrc/cad/iverilog

["Joerg Sonnenberger" <joerg%netbsd.org@localhost>]

Module Name:    pkgsrc
Committed By:   joerg
Date:           Thu Mar 26 02:37:14 UTC 2020

Modified Files:
        pkgsrc/cad/iverilog: distinfo
Added Files:
        pkgsrc/cad/iverilog/patches: patch-Makefile.in patch-cadpli_Makefile.in
            patch-tgt-pcb_Makefile.in patch-vhdlpp_Makefile.in
            patch-vvp_Makefile.in
Removed Files:
        pkgsrc/cad/iverilog/patches: patch-ad patch-cadpli_Makefile

Log Message:
Fix racy bison use. Rename patch to match patched file.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 pkgsrc/cad/iverilog/distinfo
cvs rdiff -u -r0 -r1.1 pkgsrc/cad/iverilog/patches/patch-Makefile.in \
    pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile.in \
    pkgsrc/cad/iverilog/patches/patch-tgt-pcb_Makefile.in \
    pkgsrc/cad/iverilog/patches/patch-vhdlpp_Makefile.in \
    pkgsrc/cad/iverilog/patches/patch-vvp_Makefile.in
cvs rdiff -u -r1.3 -r0 pkgsrc/cad/iverilog/patches/patch-ad
cvs rdiff -u -r1.1 -r0 pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/cad/iverilog/distinfo
diff -u pkgsrc/cad/iverilog/distinfo:1.3 pkgsrc/cad/iverilog/distinfo:1.4
--- pkgsrc/cad/iverilog/distinfo:1.3    Tue Feb 18 17:44:26 2020
+++ pkgsrc/cad/iverilog/distinfo        Thu Mar 26 02:37:14 2020
@@ -1,9 +1,12 @@
-$NetBSD: distinfo,v 1.3 2020/02/18 17:44:26 joerg Exp $
+$NetBSD: distinfo,v 1.4 2020/03/26 02:37:14 joerg Exp $
 
 SHA1 (verilog-10.1.1.tar.gz) = 7f4cead8cabb90cc4525951357c43866ca710749
 RMD160 (verilog-10.1.1.tar.gz) = 77c933b712ab027b13a81e3eead7ee4f565741b7
 SHA512 (verilog-10.1.1.tar.gz) = a57fdce3d870be8ce39eb3050dabd5a2d4d491c657b85ccbf775bef7fa9a6889a18bf4d2508341ef2cc17d872b5d6c802d4fd8585e4ec7952526699ebb24bfac
 Size (verilog-10.1.1.tar.gz) = 1684925 bytes
+SHA1 (patch-Makefile.in) = 9e66fedfa8487be3b7f82c152504404545f8bd06
 SHA1 (patch-aa) = cf075110416f6db0892129796cd83b8ae8de55fa
-SHA1 (patch-ad) = bf7d227ed3b321021d8aff54cd008f4b2a1557b9
-SHA1 (patch-cadpli_Makefile) = ed21a5f529ac449c26b831cbd5fde052d9ed5466
+SHA1 (patch-cadpli_Makefile.in) = ed21a5f529ac449c26b831cbd5fde052d9ed5466
+SHA1 (patch-tgt-pcb_Makefile.in) = a1f77b1763cdcb19bc304708c83f34359f9a3917
+SHA1 (patch-vhdlpp_Makefile.in) = feed15f8e8e60c73b0f1f25a62d30fec7fa25a01
+SHA1 (patch-vvp_Makefile.in) = 67bef8f6bbf03c8cf548785f5d8124e03771026a

Added files:

Index: pkgsrc/cad/iverilog/patches/patch-Makefile.in
diff -u /dev/null pkgsrc/cad/iverilog/patches/patch-Makefile.in:1.1
--- /dev/null   Thu Mar 26 02:37:14 2020
+++ pkgsrc/cad/iverilog/patches/patch-Makefile.in       Thu Mar 26 02:37:14 2020
@@ -0,0 +1,23 @@
+$NetBSD: patch-Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
+
+--- Makefile.in.orig   2016-02-10 19:39:12.000000000 +0000
++++ Makefile.in
+@@ -249,14 +249,13 @@ version.exe: $(srcdir)/version.c $(srcdi
+ main.o: main.cc version_tag.h
+ 
+ lexor.o: lexor.cc parse.h
+-
+-parse.o: parse.cc
++parse.o: parse.cc parse.h
+ 
+ # Build this in two steps to avoid parallel build issues (see pr3462585)
+ parse.cc: $(srcdir)/parse.y
+-      $(YACC) --verbose -t -p VL -d -o $@ $<
+-parse.h: parse.cc
+-      mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
++      $(YACC) --verbose -t -p VL -d -o parse-tmp1.cc $< && mv parse-tmp1.cc $@
++parse.h: $(srcdir)/parse.y
++      $(YACC) --verbose -t -p VL -d -o parse-tmp2.cc $< && mv parse-tmp2.hh $@
+ 
+ syn-rules.cc: $(srcdir)/syn-rules.y
+       $(YACC) --verbose -t -p syn_ -o $@ $<
Index: pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile.in
diff -u /dev/null pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile.in:1.1
--- /dev/null   Thu Mar 26 02:37:14 2020
+++ pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile.in        Thu Mar 26 02:37:14 2020
@@ -0,0 +1,17 @@
+$NetBSD: patch-cadpli_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
+
+gcc -std=gnu99 -shared -L/usr/lib -Wl,-R/usr/lib -L/usr/pkg/lib -Wl,-R/usr/pkg/lib -o cadpli.vpl cadpli.o ../libveriuser/libveriuser.o -L../vvp -lvpi
+mkdir: dep: Not a directory
+Makefile:52: recipe for target 'dep' failed
+
+--- cadpli/Makefile.in~        2013-08-20 04:10:31.000000000 +0900
++++ cadpli/Makefile.in 2013-12-20 22:03:29.000000000 +0900
+@@ -51,7 +51,7 @@ check: all
+ dep:
+       mkdir dep
+ 
+-%.o: %.c
++%.o: %.c dep
+       $(CC) $(CPPFLAGS) $(CFLAGS) @DEPENDENCY_FLAG@ -c $<
+       mv $*.d dep
+ 
Index: pkgsrc/cad/iverilog/patches/patch-tgt-pcb_Makefile.in
diff -u /dev/null pkgsrc/cad/iverilog/patches/patch-tgt-pcb_Makefile.in:1.1
--- /dev/null   Thu Mar 26 02:37:14 2020
+++ pkgsrc/cad/iverilog/patches/patch-tgt-pcb_Makefile.in       Thu Mar 26 02:37:14 2020
@@ -0,0 +1,17 @@
+$NetBSD: patch-tgt-pcb_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
+
+--- tgt-pcb/Makefile.in.orig   2020-03-25 22:40:55.245547401 +0000
++++ tgt-pcb/Makefile.in
+@@ -88,9 +88,9 @@ fp_lex.cc: $(srcdir)/fp.lex
+       $(LEX) -s -ofp_lex.cc $(srcdir)/fp.lex
+ 
+ fp.cc: $(srcdir)/fp.y
+-      $(YACC) --verbose -t -p fp -d -o $@ $<
+-fp.h: fp.cc
+-      mv fp.cc.h $@ 2>/dev/null || mv fp.hh $@
++      $(YACC) --verbose -t -p fp -d -o fp-tmp1.cc $< && mv fp-tmp1.cc $@
++fp.h: $(srcdir)/fp.y
++      $(YACC) --verbose -t -p fp -d -o fp-tmp1.cc $< && mv fp-tmp1.hh $@
+ 
+ ifeq (@WIN32@,yes)
+   TGTLDFLAGS=-L.. -livl
Index: pkgsrc/cad/iverilog/patches/patch-vhdlpp_Makefile.in
diff -u /dev/null pkgsrc/cad/iverilog/patches/patch-vhdlpp_Makefile.in:1.1
--- /dev/null   Thu Mar 26 02:37:14 2020
+++ pkgsrc/cad/iverilog/patches/patch-vhdlpp_Makefile.in        Thu Mar 26 02:37:14 2020
@@ -0,0 +1,17 @@
+$NetBSD: patch-vhdlpp_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
+
+--- vhdlpp/Makefile.in.orig    2020-03-25 22:02:30.283023254 +0000
++++ vhdlpp/Makefile.in
+@@ -117,9 +117,9 @@ lexor.cc: $(srcdir)/lexor.lex
+ 
+ # Build this in two steps to avoid parallel build issues (see pr3462585)
+ parse.cc: $(srcdir)/parse.y
+-      $(YACC) --verbose -t -d -o $@ $<
+-parse.h: parse.cc
+-      mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
++      $(YACC) --verbose -t -d -o parse-tmp1.cc $< && mv parse-tmp1.cc $@
++parse.h: $(srcdir)/parse.y
++      $(YACC) --verbose -t -d -o parse-tmp2.cc $< && mv parse-tmp2.hh $@
+ 
+ lexor_keyword.o: lexor_keyword.cc parse.h
+ 
Index: pkgsrc/cad/iverilog/patches/patch-vvp_Makefile.in
diff -u /dev/null pkgsrc/cad/iverilog/patches/patch-vvp_Makefile.in:1.1
--- /dev/null   Thu Mar 26 02:37:14 2020
+++ pkgsrc/cad/iverilog/patches/patch-vvp_Makefile.in   Thu Mar 26 02:37:14 2020
@@ -0,0 +1,17 @@
+$NetBSD: patch-vvp_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
+
+--- vvp/Makefile.in.orig       2020-03-25 22:02:32.770254871 +0000
++++ vvp/Makefile.in
+@@ -165,9 +165,9 @@ tables.o: tables.cc
+ 
+ # Build this in two steps to avoid parallel build issues (see pr3462585)
+ parse.cc: $(srcdir)/parse.y
+-      $(YACC) --verbose -t -d -o $@ $<
+-parse.h: parse.cc
+-      mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
++      $(YACC) --verbose -t -d -o parse-tmp1.cc $< && mv parse-tmp1.cc $@
++parse.h: $(srcdir)/parse.y
++      $(YACC) --verbose -t -d -o parse-tmp2.cc $< && mv parse-tmp2.hh $@
+ 
+ lexor.cc: $(srcdir)/lexor.lex
+       $(LEX) -s -olexor.cc $(srcdir)/lexor.lex