CVS commit: pkgsrc/cad/verilator

["Ryo ONODERA" <ryoon%netbsd.org@localhost>]

Module Name:    pkgsrc
Committed By:   ryoon
Date:           Wed Mar 18 13:33:38 UTC 2020

Modified Files:
        pkgsrc/cad/verilator: Makefile PLIST distinfo

Log Message:
verilator: Update to 4.030

Changelog:
Verilator 4.030 2020-03-08

    Add split_var metacomment to assist UNOPTFLAT fixes, #2066. [Yutetsu TAKATSUKASA]

    Add support for $dumpfile and $dumpvars, #2126. [Alexander Grobman]

    Add support for dynamic arrays, #379.

    Add +verilator+noassert flag to disable assertion checking. [Tobias W\303\266lfel]

    Add check for assertOn for asserts, #2162. [Tobias W\303\266lfel]

    Add --structs-packed for forward compatibility.

    Fix genblk naming with directly nested generate blocks, #2176. [Alexander Grobman]

    Implement $displayb/o/h, $writeb/o/h, etc, #1637.

    Use gcc -Os in examples instead of -O2 for better average performance.

    Fix undeclared VL_SHIFTR_WWQ, #2114. [Alex Solomatnikov]

Verilator 4.028 2020-02-08

    Support attributes (public, isolate_assignments, etc.) in configuration files.

    Add -match to lint_off to waive warnings. [Philipp Wagner]

    Link Verilator binary partially statically, #2146. [Geza Lore]

    Verilation speed improvements, #2133, #2138. [Geza Lore]

    Support libgoogle-perftools-dev's libtcmalloc if available, #2137. [Geza Lore]

    Support $readmem/$writemem with assoc arrarys, #2100. [agrobman]

    Support type(expression) operator and $typename, #1650.

    Support left justified $display, #2101. [Pieter Kapsenberg]

    Support string character access via indexing.

    Support enum.next(k) with constant k > 1, #2125. [Tobias Rosenkranz]

    Support parameter access from arrays of interfaces, #2155. [Todd Strader]

    Add parameter values in XML. #2110. [Pieter Kapsenberg]

    Add loc column location in XML (replaces fl), #2122. [Pieter Kapsenberg]

    Add error on misused define. [Topa Tota]

    Add parameter to set maximum signal width, #2082. [\303\230yvind Harboe]

    Add warning on genvar in normal for loop, #2143. [yurivict]

    Fix VPI scope naming for public modules. [Nandu Raj]

    Fix FST tracing of enums inside structs. [fsiegle]

    Fix WIDTH warning on

    Fix OpenSolaris issues, #2154. [brancoliticus]

Verilator 4.026 2020-01-11

    Docker images are now available for Verilator releases.

    Support bounded queues.

    Support implication operator "|->" in assertions, #2069. [Peter Monsson]

    Support string compare, ato*, etc methods, #1606. [Yutetsu TAKATSUKASA]

    Support immediate cover statements.

    Ignore `uselib to end-of-line, #1634. [Frederic Antonin]

    Update FST trace API for better performance.

    Add vpiTimeUnit and allow to specify time as string, #1636. [Stefan Wallentowitz]

    Add error when `resetall inside module (IEEE 2017-22.3).

    Add cleaner error on version control conflicts in sources.

    Fix little endian cell ranges, #1631. [Julien Margetts]

    Fix queue issues, #1641, #1643. [Peter Monsson, Stefan Wallentowitz]

    Fix strcasecmp for windows, #1651. [Kuba Ober]

    Fix disable iff in assertions. Closes #1404. [Peter Monsson]

    Fix huge case statement performance. Closes #1644. [Julien Margetts]

    Fix tracing -1 index arrays. Closes #2090. [Yutetsu Takatsukasa]

    Fix expand optimization slowing --lint-only. Closes #2091. [Thomas Watts]

    Fix %{number}s with strings. #2093. [agrobman]

    Fix shebang breaking some shells. Closes #2067. [zdave]

Verilator 4.024 2019-12-08

    Support associative arrays (excluding [*] and pattern assignments), bug544.

    Support queues (excluding {} notation and pattern assignments), bug545.

    Add +verilator+error+limit to see more assertion errors. [Peter Monsson]

    Support string.toupper and string.tolower.

    Support $rewind and $ungetc.

    Support shortreal as real, with a SHORTREAL warning.

    Add -Wpedantic and -Wno-context for compliance testing.

    Add error on redefining preprocessor directives. [Piotr Binkowski]

    Support $value$plusargs float and shorts, bug1592, bug1619. [Garrett Smith]

    Fix gate lvalue optimization error, bug831. [Jonathon Donaldson, Driss Hafdi]

    Fix color assertion on empty if, bug1604. [Andrew Holme]

    Fix for loop missing initializer, bug1605. [Andrew Holme]

    Fix hang on concat error, bug1608. [Bogdan Vukobratovic]

    Fix VPI timed callbacks to be one-shot, pull5. [Matthew Ballance]

    Fix // in filenames, bug1610. [Peter Nelson]

    Fix $display("%p") to be closer to IEEE.

    Fix labels on functions with returns, bug1614. [Mitch Hayenga]

    Fix false unused message on __Vemumtab, msg3180. [Tobias Rosenkranz]

    Fix assertion on dotted parameter arrayed function, bug1620. [Rich Porter]

    Fix interface reference tracing, bug1595. [Todd Strader]

    Fix error on unpacked concatenations, bug1627. [Driss Hafdi]

Verilator 4.022 2019-11-10

    Add --protect-lib, bug1490. [Todd Strader]

    Add cmake support, bug1363. [Patrick Stewart]

    Examples have been renamed.

    Add --protect-ids to obscure information in objects, bug1521. [Todd Strader]

    Add --trace-coverage.

    Add --xml-output.

    Support multithreading on Windows. [Patrick Stewart]

    Suppress 'command failed' on normal errors.

    Support some unpacked arrays in parameters, bug1315. [Marshal Qiao]

    Add interface port visibility in traces, bug1594. [Todd Strader]

    Increase case duplicate/incomplete to 16 bit tables, bug1545. [Yossi Nivin]

    Support quoted arguments in -f files, bug1535. [Yves Mathieu]

    Optimize modulus by power-of-two constants, and masked conditionals.

    Fix detecting missing reg types, bug1570. [Jacko Dirks]

    Fix multithreaded yield behavior when no work. [Patrick Stewart]

    Fix bad-syntax crashes, bug1548, bug1550-1553, bug1557-1560, bug1563, bug1573-1577, bug1579, bug1582-1591. [Eric Rippey]

    Fix false CMPCONST/UNSIGNED warnings on "inside", bug1581. [Mitch Hayenga]

Verilator 4.020 2019-10-06

    Support $fseek, $ftell, $frewind, bug1496. [Howard Su]

    Add --public-flat-rw, bug1511. [Stefan Wallentowitz]

    Support vpiModule, bug1469. [Stefan Wallentowitz]

    Make Syms file honor --output-split-cfuncs, bug1499. [Todd Strader]

    Fix make test with no VERILATOR_ROOT, bug1494. [Ahmed El-Mahmoudy]

    Fix error on multidimensional cells, bug1505. [Anderson Ignacio Da Silva]

    Fix config_rev revision detection on old versions.

    Fix false warning on backward indexing, bug1507. [Hao Shi]

    Fix vpiType accessor, bug1509, bug1510. [Stefan Wallentowitz]

    Fix ugly error on interface misuse, bug1525. [Bogdan Vukobratovic]

    Fix misc bad-syntax crashes, bug1529-bug1533. [Eric Rippey]

    Fix case statements with strings, bug1536. [Philipp Wagner]

Verilator 4.018 2019-08-29

    When showing an error, show source code and offer suggestions of replacements.

    When showing an error, show the instance location, bug1305. [Todd Strader]

    Add --rr, bug1481. [Todd Strader]

    Change MULTITOP to warning to help linting, see manual.

    Add XSim support to driver.pl, bug1493. [Todd Strader]

    Show included-from filenames in warnings, bug1439. [Todd Strader]

    Fix elaboration time errors, bug1429. [Udi Finkelstein]

    Fix not reporting some duplicate signals/ports, bug1462. [Peter Gerst]

    Fix not in array context on non-power-of-two slices, msg2946. [Yu Sheng Lin]

    Fix system compile flags injection. [Gianfranco Costamagna]

    Fix enum values not being sized based on parent, bug1442. [Dan Petrisko]

    Fix internal error on gate optimization of assign, bug1475. [Oyvind Harboe]

    Add --dpi-hdr-only, bug1491. [Todd Strader]


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 pkgsrc/cad/verilator/Makefile
cvs rdiff -u -r1.2 -r1.3 pkgsrc/cad/verilator/PLIST
cvs rdiff -u -r1.3 -r1.4 pkgsrc/cad/verilator/distinfo

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/cad/verilator/Makefile
diff -u pkgsrc/cad/verilator/Makefile:1.4 pkgsrc/cad/verilator/Makefile:1.5
--- pkgsrc/cad/verilator/Makefile:1.4   Fri Aug 23 13:05:49 2019
+++ pkgsrc/cad/verilator/Makefile       Wed Mar 18 13:33:38 2020
@@ -1,6 +1,6 @@
-# $NetBSD: Makefile,v 1.4 2019/08/23 13:05:49 ryoon Exp $
+# $NetBSD: Makefile,v 1.5 2020/03/18 13:33:38 ryoon Exp $
 
-DISTNAME=      verilator-4.016
+DISTNAME=      verilator-4.030
 CATEGORIES=    cad
 MASTER_SITES=  https://www.veripool.org/ftp/
 EXTRACT_SUFX=  .tgz
@@ -17,6 +17,7 @@ USE_LANGUAGES=        c c++
 
 TOOLS_PLATFORM.flex=   # Use flex from pkgsrc
 
+REPLACE_PERL+= bin/*
 REPLACE_PERL+= test_regress/*.pl
 REPLACE_PERL+= test_regress/t/*.pl
 

Index: pkgsrc/cad/verilator/PLIST
diff -u pkgsrc/cad/verilator/PLIST:1.2 pkgsrc/cad/verilator/PLIST:1.3
--- pkgsrc/cad/verilator/PLIST:1.2      Mon Apr  1 12:22:53 2019
+++ pkgsrc/cad/verilator/PLIST  Wed Mar 18 13:33:38 2020
@@ -1,4 +1,4 @@
-@comment $NetBSD: PLIST,v 1.2 2019/04/01 12:22:53 ryoon Exp $
+@comment $NetBSD: PLIST,v 1.3 2020/03/18 13:33:38 ryoon Exp $
 bin/verilator
 bin/verilator_bin
 bin/verilator_bin_dbg
@@ -12,24 +12,38 @@ man/man1/verilator_gantt.1
 man/man1/verilator_profcfunc.1
 share/pkgconfig/verilator.pc
 share/verilator/bin/verilator_includer
-share/verilator/examples/hello_world_c/Makefile
-share/verilator/examples/hello_world_c/sim_main.cpp
-share/verilator/examples/hello_world_c/top.v
-share/verilator/examples/hello_world_sc/Makefile
-share/verilator/examples/hello_world_sc/sc_main.cpp
-share/verilator/examples/hello_world_sc/top.v
-share/verilator/examples/tracing_c/Makefile
-share/verilator/examples/tracing_c/Makefile_obj
-share/verilator/examples/tracing_c/input.vc
-share/verilator/examples/tracing_c/sim_main.cpp
-share/verilator/examples/tracing_c/sub.v
-share/verilator/examples/tracing_c/top.v
-share/verilator/examples/tracing_sc/Makefile
-share/verilator/examples/tracing_sc/Makefile_obj
-share/verilator/examples/tracing_sc/input.vc
-share/verilator/examples/tracing_sc/sc_main.cpp
-share/verilator/examples/tracing_sc/sub.v
-share/verilator/examples/tracing_sc/top.v
+share/verilator/examples/cmake_hello_c/CMakeLists.txt
+share/verilator/examples/cmake_hello_c/Makefile
+share/verilator/examples/cmake_hello_sc/CMakeLists.txt
+share/verilator/examples/cmake_hello_sc/Makefile
+share/verilator/examples/cmake_protect_lib/CMakeLists.txt
+share/verilator/examples/cmake_protect_lib/Makefile
+share/verilator/examples/cmake_tracing_c/CMakeLists.txt
+share/verilator/examples/cmake_tracing_c/Makefile
+share/verilator/examples/cmake_tracing_sc/CMakeLists.txt
+share/verilator/examples/cmake_tracing_sc/Makefile
+share/verilator/examples/make_hello_c/Makefile
+share/verilator/examples/make_hello_c/sim_main.cpp
+share/verilator/examples/make_hello_c/top.v
+share/verilator/examples/make_hello_sc/Makefile
+share/verilator/examples/make_hello_sc/sc_main.cpp
+share/verilator/examples/make_hello_sc/top.v
+share/verilator/examples/make_protect_lib/Makefile
+share/verilator/examples/make_protect_lib/secret_impl.v
+share/verilator/examples/make_protect_lib/sim_main.cpp
+share/verilator/examples/make_protect_lib/top.v
+share/verilator/examples/make_tracing_c/Makefile
+share/verilator/examples/make_tracing_c/Makefile_obj
+share/verilator/examples/make_tracing_c/input.vc
+share/verilator/examples/make_tracing_c/sim_main.cpp
+share/verilator/examples/make_tracing_c/sub.v
+share/verilator/examples/make_tracing_c/top.v
+share/verilator/examples/make_tracing_sc/Makefile
+share/verilator/examples/make_tracing_sc/Makefile_obj
+share/verilator/examples/make_tracing_sc/input.vc
+share/verilator/examples/make_tracing_sc/sc_main.cpp
+share/verilator/examples/make_tracing_sc/sub.v
+share/verilator/examples/make_tracing_sc/top.v
 share/verilator/include/gtkwave/fastlz.c
 share/verilator/include/gtkwave/fastlz.h
 share/verilator/include/gtkwave/fst_config.h
@@ -70,3 +84,5 @@ share/verilator/include/verilated_vpi.h
 share/verilator/include/verilatedos.h
 share/verilator/include/vltstd/svdpi.h
 share/verilator/include/vltstd/vpi_user.h
+share/verilator/verilator-config-version.cmake
+share/verilator/verilator-config.cmake

Index: pkgsrc/cad/verilator/distinfo
diff -u pkgsrc/cad/verilator/distinfo:1.3 pkgsrc/cad/verilator/distinfo:1.4
--- pkgsrc/cad/verilator/distinfo:1.3   Fri Aug 23 13:05:49 2019
+++ pkgsrc/cad/verilator/distinfo       Wed Mar 18 13:33:38 2020
@@ -1,7 +1,7 @@
-$NetBSD: distinfo,v 1.3 2019/08/23 13:05:49 ryoon Exp $
+$NetBSD: distinfo,v 1.4 2020/03/18 13:33:38 ryoon Exp $
 
-SHA1 (verilator-4.016.tgz) = dce30a001574e743198179e4f95939d84b69c7f8
-RMD160 (verilator-4.016.tgz) = eba0e31b5b4a9769fb65b842c9a4b9d4b34ecfb6
-SHA512 (verilator-4.016.tgz) = 14bb1d0493103e702b1cbe0ea7c639c04cafa87f204952f88e629012dde1fcecf8e1e51569ff7a422b4dcb0566d0fae35acc681b2e47ae88fac6937362ff3254
-Size (verilator-4.016.tgz) = 2536449 bytes
+SHA1 (verilator-4.030.tgz) = 6f70b648a2962ba52b31dd46684b7fad20cbd9c4
+RMD160 (verilator-4.030.tgz) = 36f50f095926f88dc3859ea6504fb07593f928ec
+SHA512 (verilator-4.030.tgz) = 5e1ab57a8ed51b04f6c97798c13f2f3ae24aa1ec2a2b8c9ae98099b16b2f7e9b21171412391832239464d3ad71f8f89b685a20eaa77c005b386a1db6eae02da7
+Size (verilator-4.030.tgz) = 2496204 bytes
 SHA1 (patch-Makefile.in) = 3c91715cdfaba04120ada7a328b46e0571767e06