CVS commit: pkgsrc/emulators/qemu

["Martin Husemann" <martin%netbsd.org@localhost>]

Module Name:    pkgsrc
Committed By:   martin
Date:           Thu Jan 31 13:39:10 UTC 2019

Modified Files:
        pkgsrc/emulators/qemu: Makefile distinfo
        pkgsrc/emulators/qemu/patches: patch-target_arm_cpu.h
Added Files:
        pkgsrc/emulators/qemu/patches: patch-target_arm_helper.c

Log Message:
Replace aarch64 FPU exception trap handling fix with newer version
from upstream.


To generate a diff of this commit:
cvs rdiff -u -r1.199 -r1.200 pkgsrc/emulators/qemu/Makefile
cvs rdiff -u -r1.140 -r1.141 pkgsrc/emulators/qemu/distinfo
cvs rdiff -u -r1.1 -r1.2 pkgsrc/emulators/qemu/patches/patch-target_arm_cpu.h
cvs rdiff -u -r0 -r1.1 \
    pkgsrc/emulators/qemu/patches/patch-target_arm_helper.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/emulators/qemu/Makefile
diff -u pkgsrc/emulators/qemu/Makefile:1.199 pkgsrc/emulators/qemu/Makefile:1.200
--- pkgsrc/emulators/qemu/Makefile:1.199        Tue Jan 29 16:01:29 2019
+++ pkgsrc/emulators/qemu/Makefile      Thu Jan 31 13:39:10 2019
@@ -1,7 +1,7 @@
-# $NetBSD: Makefile,v 1.199 2019/01/29 16:01:29 martin Exp $
+# $NetBSD: Makefile,v 1.200 2019/01/31 13:39:10 martin Exp $
 
 DISTNAME=      qemu-3.1.0
-PKGREVISION=   3
+PKGREVISION=   4
 CATEGORIES=    emulators
 MASTER_SITES=  https://download.qemu.org/
 EXTRACT_SUFX=  .tar.xz

Index: pkgsrc/emulators/qemu/distinfo
diff -u pkgsrc/emulators/qemu/distinfo:1.140 pkgsrc/emulators/qemu/distinfo:1.141
--- pkgsrc/emulators/qemu/distinfo:1.140        Tue Jan 29 16:01:29 2019
+++ pkgsrc/emulators/qemu/distinfo      Thu Jan 31 13:39:10 2019
@@ -1,4 +1,4 @@
-$NetBSD: distinfo,v 1.140 2019/01/29 16:01:29 martin Exp $
+$NetBSD: distinfo,v 1.141 2019/01/31 13:39:10 martin Exp $
 
 SHA1 (qemu-3.1.0.tar.xz) = 3ed63c0c05abc8c8ec075dac2688c229f139a5da
 RMD160 (qemu-3.1.0.tar.xz) = 7650d76b8578ee2c31cef048c7929b30c607b83d
@@ -16,5 +16,6 @@ SHA1 (patch-hw_display_omap__dss.c) = 6b
 SHA1 (patch-hw_net_etraxfs__eth.c) = e5dd1661d60dbcd27b332403e0843500ba9544bc
 SHA1 (patch-hw_net_xilinx__axienet.c) = ebcd2676d64ce6f31e4a8c976d4fdf530ad5e8b7
 SHA1 (patch-hw_usb_dev-mtp.c) = 66543b5559d92f8e2fa9a6eb85e5dfe7c1ad3339
-SHA1 (patch-target_arm_cpu.h) = 74b8b52c0d6fd34b5755ef60a459d6d07630dc3b
+SHA1 (patch-target_arm_cpu.h) = 0f70a35900c7cc3124dc11969643e0eef6ad6af5
+SHA1 (patch-target_arm_helper.c) = 08f9425422080442a2c90bb252423bab38651ae4
 SHA1 (patch-tests_Makefile.include) = 42345d697cb2e324dccf1d68bd8d61e8001c6162

Index: pkgsrc/emulators/qemu/patches/patch-target_arm_cpu.h
diff -u pkgsrc/emulators/qemu/patches/patch-target_arm_cpu.h:1.1 pkgsrc/emulators/qemu/patches/patch-target_arm_cpu.h:1.2
--- pkgsrc/emulators/qemu/patches/patch-target_arm_cpu.h:1.1    Tue Jan 29 16:01:29 2019
+++ pkgsrc/emulators/qemu/patches/patch-target_arm_cpu.h        Thu Jan 31 13:39:10 2019
@@ -1,16 +1,20 @@
-$NetBSD: patch-target_arm_cpu.h,v 1.1 2019/01/29 16:01:29 martin Exp $
+$NetBSD: patch-target_arm_cpu.h,v 1.2 2019/01/31 13:39:10 martin Exp $
 
-Patch from upstream maintain (Peter Maydell) to fix NetBSD ATF tests
-non-trapping FP exception detection.
+Upstream fix for arm/aarch64 FPU exception handling
+test failures in the NetBSD ATF test suit.
 
 --- target/arm/cpu.h.orig      2018-12-11 18:44:34.000000000 +0100
-+++ target/arm/cpu.h   2019-01-29 15:44:39.081529725 +0100
-@@ -1297,7 +1297,7 @@ void vfp_set_fpscr(CPUARMState *env, uin
-  * we store the underlying state in fpscr and just mask on read/write.
-  */
++++ target/arm/cpu.h   2019-01-31 14:29:37.037792781 +0100
+@@ -1299,6 +1299,12 @@ void vfp_set_fpscr(CPUARMState *env, uin
  #define FPSR_MASK 0xf800009f
--#define FPCR_MASK 0x07ff9f00
-+#define FPCR_MASK 0x07ff0000
+ #define FPCR_MASK 0x07ff9f00
  
++#define FPCR_IOE    (1 << 8)    /* Invalid Operation exception trap enable */
++#define FPCR_DZE    (1 << 9)    /* Divide by Zero exception trap enable */
++#define FPCR_OFE    (1 << 10)   /* Overflow exception trap enable */
++#define FPCR_UFE    (1 << 11)   /* Underflow exception trap enable */
++#define FPCR_IXE    (1 << 12)   /* Inexact exception trap enable */
++#define FPCR_IDE    (1 << 15)   /* Input Denormal exception trap enable */
  #define FPCR_FZ16   (1 << 19)   /* ARMv8.2+, FP16 flush-to-zero */
  #define FPCR_FZ     (1 << 24)   /* Flush-to-zero enable bit */
+ #define FPCR_DN     (1 << 25)   /* Default NaN enable bit */

Added files:

Index: pkgsrc/emulators/qemu/patches/patch-target_arm_helper.c
diff -u /dev/null pkgsrc/emulators/qemu/patches/patch-target_arm_helper.c:1.1
--- /dev/null   Thu Jan 31 13:39:10 2019
+++ pkgsrc/emulators/qemu/patches/patch-target_arm_helper.c     Thu Jan 31 13:39:10 2019
@@ -0,0 +1,20 @@
+$NetBSD: patch-target_arm_helper.c,v 1.1 2019/01/31 13:39:10 martin Exp $
+
+Upstream fix for arm/aarch64 FPU exception handling
+test failures in the NetBSD ATF test suit.
+
+--- target/arm/helper.c.orig   2018-12-11 18:44:34.000000000 +0100
++++ target/arm/helper.c        2019-01-31 14:29:37.050410598 +0100
+@@ -11747,6 +11747,12 @@
+         val &= ~FPCR_FZ16;
+     }
+ 
++    /*
++     * We don't implement trapped exception handling, so the
++     * trap enable bits are all RAZ/WI (not RES0!)
++     */
++    val &= ~(FPCR_IDE | FPCR_IXE | FPCR_UFE | FPCR_OFE | FPCR_DZE | FPCR_IOE);
++
+     changed = env->vfp.xregs[ARM_VFP_FPSCR];
+     env->vfp.xregs[ARM_VFP_FPSCR] = (val & 0xffc8ffff);
+     env->vfp.vec_len = (val >> 16) & 7;