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CVS commit: pkgsrc/emulators/gxemul



Module Name:    pkgsrc
Committed By:   ryoon
Date:           Fri Jan  4 13:35:17 UTC 2019

Modified Files:
        pkgsrc/emulators/gxemul: Makefile PLIST distinfo
        pkgsrc/emulators/gxemul/patches: patch-ad
            patch-src_components_cpu_CPUDyntransComponent.cc
            patch-src_components_cpu_M88K__CPUComponent.cc
            patch-src_components_cpu_MIPS__CPUComponent.cc
            patch-src_cpus_cpu_mips.cc patch-src_devices_dev__sh4.cc
            patch-src_include_components_CPUDyntransComponent.h
            patch-src_include_components_M88K__CPUComponent.h
            patch-src_include_components_MIPS__CPUComponent.h
            patch-src_include_mips_cpu_types.h
            patch-src_include_refcount__ptr.h
            patch-src_machines_machine__pmax.cc
Removed Files:
        pkgsrc/emulators/gxemul/patches: patch-aa patch-ae patch-ag
            patch-src_console_x11.cc patch-src_cpus_cpu.cc
            patch-src_cpus_cpu__alpha.cc patch-src_cpus_cpu__alpha__palcode.cc
            patch-src_cpus_cpu__dyntrans.cc patch-src_cpus_cpu__m88k.cc
            patch-src_cpus_cpu__m88k__instr.cc
            patch-src_cpus_cpu__m88k__instr__loadstore.cc
            patch-src_cpus_cpu__ppc.cc patch-src_cpus_cpu__ppc__instr.cc
            patch-src_cpus_cpu__sh.cc patch-src_cpus_cpu_mips_instr.cc
            patch-src_cpus_memory__alpha.cc patch-src_cpus_memory__mips__v2p.cc
            patch-src_cpus_memory__ppc.cc patch-src_cpus_memory__sh.cc
            patch-src_debugger_debugger.cc patch-src_debugger_debugger__cmds.cc
            patch-src_devices_bus__pci.cc patch-src_devices_dev__algor.cc
            patch-src_devices_dev__dreamcast__gdrom.cc
            patch-src_devices_dev__dreamcast__maple.cc
            patch-src_devices_dev__lca.cc patch-src_devices_dev__pvr.cc
            patch-src_devices_dev__sgi__mardigras.cc
            patch-src_devices_dev__vga.cc patch-src_devices_dev__vr41xx.cc
            patch-src_devices_dev__wdc.cc patch-src_disk_bootblock.cc
            patch-src_disk_diskimage.cc patch-src_file_file__elf.cc
            patch-src_file_file__raw.cc patch-src_machines_machine__landisk.cc
            patch-src_machines_machine__test.cc patch-src_main_GXemul.cc
            patch-src_old__main_emul.cc patch-src_old__main_main.cc
            patch-src_old__main_memory.cc patch-src_old__main_settings.cc
            patch-src_promemul_arcbios.cc patch-src_promemul_dec__prom.cc
            patch-src_promemul_dreamcast.cc patch-src_promemul_ps2__bios.cc
            patch-src_symbol_symbol.cc

Log Message:
Update to 0.6.1

* Update MASTER_SITES and HOMEPAGE

Changelog:
* Support OpenBSD/sgi 6.4
* Add luna-88k and luna-88k2 emulations
* Add i960 emulation stub


To generate a diff of this commit:
cvs rdiff -u -r1.61 -r1.62 pkgsrc/emulators/gxemul/Makefile
cvs rdiff -u -r1.26 -r1.27 pkgsrc/emulators/gxemul/PLIST
cvs rdiff -u -r1.54 -r1.55 pkgsrc/emulators/gxemul/distinfo
cvs rdiff -u -r1.9 -r0 pkgsrc/emulators/gxemul/patches/patch-aa
cvs rdiff -u -r1.2 -r1.3 pkgsrc/emulators/gxemul/patches/patch-ad \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu_mips.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h \
    pkgsrc/emulators/gxemul/patches/patch-src_include_refcount__ptr.h \
    pkgsrc/emulators/gxemul/patches/patch-src_machines_machine__pmax.cc
cvs rdiff -u -r1.1 -r0 pkgsrc/emulators/gxemul/patches/patch-ae \
    pkgsrc/emulators/gxemul/patches/patch-src_console_x11.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__alpha.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__alpha__palcode.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__dyntrans.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__m88k.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__m88k__instr.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__m88k__instr__loadstore.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__ppc.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__ppc__instr.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu__sh.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_memory__alpha.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_memory__mips__v2p.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_memory__ppc.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_memory__sh.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_debugger_debugger.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_debugger_debugger__cmds.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_bus__pci.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__algor.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__dreamcast__maple.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__lca.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__pvr.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__sgi__mardigras.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__vga.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__vr41xx.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__wdc.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_disk_bootblock.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_disk_diskimage.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_file_file__elf.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_file_file__raw.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_machines_machine__landisk.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_machines_machine__test.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_main_GXemul.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_old__main_emul.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_old__main_main.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_old__main_memory.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_old__main_settings.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_promemul_arcbios.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_promemul_dec__prom.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_promemul_dreamcast.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_promemul_ps2__bios.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_symbol_symbol.cc
cvs rdiff -u -r1.5 -r0 pkgsrc/emulators/gxemul/patches/patch-ag
cvs rdiff -u -r1.1 -r1.2 \
    pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_CPUDyntransComponent.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_M88K__CPUComponent.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_MIPS__CPUComponent.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_include_components_CPUDyntransComponent.h \
    pkgsrc/emulators/gxemul/patches/patch-src_include_components_M88K__CPUComponent.h \
    pkgsrc/emulators/gxemul/patches/patch-src_include_components_MIPS__CPUComponent.h
cvs rdiff -u -r1.3 -r0 \
    pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu_mips_instr.cc \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__dreamcast__gdrom.cc
cvs rdiff -u -r1.3 -r1.4 \
    pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__sh4.cc

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: pkgsrc/emulators/gxemul/Makefile
diff -u pkgsrc/emulators/gxemul/Makefile:1.61 pkgsrc/emulators/gxemul/Makefile:1.62
--- pkgsrc/emulators/gxemul/Makefile:1.61       Wed Aug  8 13:53:48 2018
+++ pkgsrc/emulators/gxemul/Makefile    Fri Jan  4 13:35:16 2019
@@ -1,12 +1,11 @@
-# $NetBSD: Makefile,v 1.61 2018/08/08 13:53:48 gson Exp $
+# $NetBSD: Makefile,v 1.62 2019/01/04 13:35:16 ryoon Exp $
 
-DISTNAME=      gxemul-0.6.0.1
-PKGREVISION=   7
+DISTNAME=      gxemul-0.6.1
 CATEGORIES=    emulators
-MASTER_SITES=  http://gxemul.sourceforge.net/src/
+MASTER_SITES=  ${MASTER_SITE_SOURCEFORGE:=gxemul/}
 
 MAINTAINER=    pkgsrc-users%NetBSD.org@localhost
-HOMEPAGE=      http://gxemul.sourceforge.net/
+HOMEPAGE=      http://gavare.se/gxemul/
 COMMENT=       Framework for full-system computer architecture emulation
 LICENSE=       modified-bsd
 

Index: pkgsrc/emulators/gxemul/PLIST
diff -u pkgsrc/emulators/gxemul/PLIST:1.26 pkgsrc/emulators/gxemul/PLIST:1.27
--- pkgsrc/emulators/gxemul/PLIST:1.26  Mon Dec  8 20:55:19 2014
+++ pkgsrc/emulators/gxemul/PLIST       Fri Jan  4 13:35:16 2019
@@ -1,4 +1,4 @@
-@comment $NetBSD: PLIST,v 1.26 2014/12/08 20:55:19 ryoon Exp $
+@comment $NetBSD: PLIST,v 1.27 2019/01/04 13:35:16 ryoon Exp $
 bin/gxemul
 man/man1/gxemul.1
 share/doc/gxemul/20040504-ultrix45-boot1.png
@@ -33,10 +33,6 @@ share/doc/gxemul/20050427-netbsd-hpcmips
 share/doc/gxemul/20050427-netbsd-hpcmips-2_small.png
 share/doc/gxemul/20050617-openbsd-sgi.png
 share/doc/gxemul/20050617-openbsd-sgi_small.png
-share/doc/gxemul/20050817-sgi-o2-success-7.png
-share/doc/gxemul/20050817-sgi-o2-success-7_small.png
-share/doc/gxemul/20050817-sgi-o2-success-8.png
-share/doc/gxemul/20050817-sgi-o2-success-8_small.png
 share/doc/gxemul/20051007-netbsd-cats-installed.png
 share/doc/gxemul/20051007-netbsd-cats-installed_small.png
 share/doc/gxemul/20051007-openbsd-cats-installed.png
@@ -101,6 +97,11 @@ share/doc/gxemul/20140803-dreamcast-glte
 share/doc/gxemul/20140803-dreamcast-gltest.png
 share/doc/gxemul/20140803-serial-upload-slave-small.png
 share/doc/gxemul/20140803-serial-upload-slave.png
+share/doc/gxemul/20180220-openbsd-luna88k-5.4-small.png
+share/doc/gxemul/20180220-openbsd-luna88k-5.4.png
+share/doc/gxemul/20180910-sgiip32prom-4.13.png
+share/doc/gxemul/20181018-openbsd-sgi-o2-small.png
+share/doc/gxemul/20181018-openbsd-sgi-o2.png
 share/doc/gxemul/Doxyfile
 share/doc/gxemul/HISTORY
 share/doc/gxemul/LICENSE
@@ -110,6 +111,7 @@ share/doc/gxemul/TODO.html
 share/doc/gxemul/components/component_cache.html
 share/doc/gxemul/components/component_cpu.html
 share/doc/gxemul/components/component_dummy.html
+share/doc/gxemul/components/component_i960_cpu.html
 share/doc/gxemul/components/component_m88k_cpu.html
 share/doc/gxemul/components/component_mainbus.html
 share/doc/gxemul/components/component_mips_cpu.html
@@ -157,6 +159,8 @@ share/doc/gxemul/head.html
 share/doc/gxemul/index.html
 share/doc/gxemul/intro.html
 share/doc/gxemul/machine_template.html
+share/doc/gxemul/machines/machine_cyclonevh.html.SKEL
+share/doc/gxemul/machines/machine_hp700rx.html.SKEL
 share/doc/gxemul/machines/machine_mvme187.html.SKEL
 share/doc/gxemul/machines/machine_sgi_ip32.html.SKEL
 share/doc/gxemul/machines/machine_testm88k-thumb.png

Index: pkgsrc/emulators/gxemul/distinfo
diff -u pkgsrc/emulators/gxemul/distinfo:1.54 pkgsrc/emulators/gxemul/distinfo:1.55
--- pkgsrc/emulators/gxemul/distinfo:1.54       Wed Aug  8 14:09:21 2018
+++ pkgsrc/emulators/gxemul/distinfo    Fri Jan  4 13:35:16 2019
@@ -1,67 +1,20 @@
-$NetBSD: distinfo,v 1.54 2018/08/08 14:09:21 gson Exp $
+$NetBSD: distinfo,v 1.55 2019/01/04 13:35:16 ryoon Exp $
 
-SHA1 (gxemul-0.6.0.1.tar.gz) = 8a9b7a6c08628c2a59a6e7e9c7c449c3826b4744
-RMD160 (gxemul-0.6.0.1.tar.gz) = 6943173d4149bfe40218715b8ed2c82b5b361e50
-SHA512 (gxemul-0.6.0.1.tar.gz) = 028764c751d67bf5da02ee2c34e6607660c2044e431b06c3d6799ba4e76f605b8c02afaa5f59c3059aff6253e35149831580bb13383121fb5ac0392c12d2aec2
-Size (gxemul-0.6.0.1.tar.gz) = 5420978 bytes
-SHA1 (patch-aa) = 6f2c0dc94606ba213bcc73527ea4bef997c89c45
-SHA1 (patch-ad) = 8dceff813ebf3702f8b48fb535708f1223254814
-SHA1 (patch-ae) = 19ef822c16f0f6dd50aea719e0bc797c39d1f9c0
-SHA1 (patch-ag) = db1c914220bf3bae6f61faba5ba9b7ed8ea995bd
-SHA1 (patch-src_components_cpu_CPUDyntransComponent.cc) = 1a70375b3ed409ef43122ce7e6935c07b4ed386d
-SHA1 (patch-src_components_cpu_M88K__CPUComponent.cc) = 931cdc9a806e9ff48dccb2a63873c52491336b30
-SHA1 (patch-src_components_cpu_MIPS__CPUComponent.cc) = 75d8276092fcdc9f548f874e5807ae8e6a2b9eae
+SHA1 (gxemul-0.6.1.tar.gz) = 150e495e91a968a49ffc7fe2390c3edff100508d
+RMD160 (gxemul-0.6.1.tar.gz) = 0434bff07970d8828531d222cc8b95c64c2d62f1
+SHA512 (gxemul-0.6.1.tar.gz) = 03dbbaa9ba5e36b4644a984f06bffa5ff9e763f395c472c0fbdfc8bca975a5fb184a676d3a6c5e1a3483c3c62a2778af9c36d2bf4ab8dcaf21b3dfac8abcd301
+Size (gxemul-0.6.1.tar.gz) = 5617712 bytes
+SHA1 (patch-ad) = 7f02cce83c58bbd5399b157a9da9c6c4260122f0
+SHA1 (patch-src_components_cpu_CPUDyntransComponent.cc) = dd7a9a83d8abce053e5e61a6aa6ae057c6c51a6a
+SHA1 (patch-src_components_cpu_M88K__CPUComponent.cc) = 4b456721aa0639b91d2dab82fb28f61a951ec8f4
+SHA1 (patch-src_components_cpu_MIPS__CPUComponent.cc) = 9bcb304937ccfa491e37da6f57729854294c420d
 SHA1 (patch-src_console_console.cc) = 0b9c07eaa26a39b20a6f6769cdf02208fc9667d3
-SHA1 (patch-src_console_x11.cc) = e1efce66afa230310615453fc6f8427b00c33b08
-SHA1 (patch-src_cpus_cpu.cc) = c882bc71844588e83e172b693142b1c725f86d17
-SHA1 (patch-src_cpus_cpu__alpha.cc) = 1ef38e5930018f310220efb0bf7f357fd5a9af7b
-SHA1 (patch-src_cpus_cpu__alpha__palcode.cc) = ae892bb7191e199329952feeb544fe31bd5407e2
-SHA1 (patch-src_cpus_cpu__dyntrans.cc) = d3887e19e1a153cc16fd38422e24efab8bfb672e
-SHA1 (patch-src_cpus_cpu__m88k.cc) = b21d57f101ef6c7275a70c2052ce089fb6a256c5
-SHA1 (patch-src_cpus_cpu__m88k__instr.cc) = 35fc38cb5a4efedf15e22be25196c39e817aeeb8
-SHA1 (patch-src_cpus_cpu__m88k__instr__loadstore.cc) = f4837cd03c47eb980d4ca815e9dc953eaa13ca6c
-SHA1 (patch-src_cpus_cpu__ppc.cc) = 013a6a6ea28acc1ba1751813b5dfa3d11d251427
-SHA1 (patch-src_cpus_cpu__ppc__instr.cc) = cdc664f35cdb289380bb959f1b07c95151b60eed
-SHA1 (patch-src_cpus_cpu__sh.cc) = b72eb6b670fad93198c9ee7d1bb57c0a69027a3a
-SHA1 (patch-src_cpus_cpu_mips.cc) = 0fdeed0a52b4b8a2e256e0f1084cf5a2131a6dce
-SHA1 (patch-src_cpus_cpu_mips_instr.cc) = 48035575ce5b075bb56c291e272dea4e8b1bebfe
-SHA1 (patch-src_cpus_memory__alpha.cc) = 9bea508cc59aa6856928f0d6f5964f5f24ac648e
-SHA1 (patch-src_cpus_memory__mips__v2p.cc) = 2b859ffa219ded4e7c4a6a0ad3047e4c444d472d
-SHA1 (patch-src_cpus_memory__ppc.cc) = e321cc7acaa4a61fda91f46b05f10863d407ae9f
-SHA1 (patch-src_cpus_memory__sh.cc) = a13b3da5acd134a9145186b8294eec19ce4f6c37
-SHA1 (patch-src_debugger_debugger.cc) = c37a93845d0b77350a22c793d84da4a05342423a
-SHA1 (patch-src_debugger_debugger__cmds.cc) = cc02739c1561b4b1e8e503bcdd8a7fcfa183f5b2
-SHA1 (patch-src_devices_bus__pci.cc) = 5a4b7360a8701055d92d22489c777884338f1f38
-SHA1 (patch-src_devices_dev__algor.cc) = 0d841679b1f230dfd52fe02836f9ff544e78cf21
-SHA1 (patch-src_devices_dev__dreamcast__gdrom.cc) = 673fbb19f530486cb64a14ac941f62db493b0900
-SHA1 (patch-src_devices_dev__dreamcast__maple.cc) = 933917c91b9dcbd2f97090760477525c3ee044a8
+SHA1 (patch-src_cpus_cpu_mips.cc) = ad6d9c8b452b1b8422d9194cadfa1c8c3d29ef21
 SHA1 (patch-src_devices_dev__footbridge.cc) = 2dc76e65fff7e6c846d9d06b74bed76075b0c79a
-SHA1 (patch-src_devices_dev__lca.cc) = 3dadd75e3c561b300c0d9fc1aff086da92c2c1ae
-SHA1 (patch-src_devices_dev__pvr.cc) = 8444baf6379ed8b4c6b2fe8943dc7f808b195981
-SHA1 (patch-src_devices_dev__sgi__mardigras.cc) = 2585bc8e0117a36e214364e5ff875754f250fae9
-SHA1 (patch-src_devices_dev__sh4.cc) = 83ab4cc46a96721da9472f392f8e91a26ee557a7
-SHA1 (patch-src_devices_dev__vga.cc) = b7e889f7ecec48ff446a2d64fe0587118de8aa21
-SHA1 (patch-src_devices_dev__vr41xx.cc) = 5daf48f57a9f16d695f913341e92944816dbf062
-SHA1 (patch-src_devices_dev__wdc.cc) = 38038c02aab576c3574a1cb468f6e7bbefe5f5da
-SHA1 (patch-src_disk_bootblock.cc) = 11dd3135cb433ced29972fe28e18568025beaf82
-SHA1 (patch-src_disk_diskimage.cc) = 05f077314ee76cd0fd77582d5b725be491a42857
-SHA1 (patch-src_file_file__elf.cc) = be7e20bfca2d10e2f7fdbf0289483416d21dec3e
-SHA1 (patch-src_file_file__raw.cc) = 9c34c96cca79b795554d307cd134334ae0eb568c
-SHA1 (patch-src_include_components_CPUDyntransComponent.h) = 4fa3c327c4ce5ee9e39e7bc49ce6029b2a7da100
-SHA1 (patch-src_include_components_M88K__CPUComponent.h) = afd07ae4df33d0c0a9d3d8c15dca4ef9ee7dd916
-SHA1 (patch-src_include_components_MIPS__CPUComponent.h) = 4e49da9af0d220a1ea7c4520d8e7e53d8d84c155
-SHA1 (patch-src_include_mips_cpu_types.h) = ae5fcfa68596f4705fc07434fcd95a3ac6205763
-SHA1 (patch-src_include_refcount__ptr.h) = 8021524ff16d3a9de65bb6188fb8c07296c5c3b7
-SHA1 (patch-src_machines_machine__landisk.cc) = ec3fd4916ab6092fb004e03e711653dbc20f5fc0
-SHA1 (patch-src_machines_machine__pmax.cc) = d556a834cd656d53a5aa851d5e89f655935aeb95
-SHA1 (patch-src_machines_machine__test.cc) = fbb54c473d77d4fe6bfb3cd01b72113991f77dc5
-SHA1 (patch-src_main_GXemul.cc) = a4ce4bd37347eaffc03216e27667fe636d35de29
-SHA1 (patch-src_old__main_emul.cc) = c8ef84dbed5adba7ee95dcc030ec190ffa002e67
-SHA1 (patch-src_old__main_main.cc) = ad0c6ca2712e69b4813eb6b712cd80033be04b7c
-SHA1 (patch-src_old__main_memory.cc) = 247ddf938a270b5069e45aca84ae36fe1a252124
-SHA1 (patch-src_old__main_settings.cc) = 759498320709b693088a177d9d264895306c825d
-SHA1 (patch-src_promemul_arcbios.cc) = 07881593bb29cc125ebaa1e424ed1fa80c52babf
-SHA1 (patch-src_promemul_dec__prom.cc) = 31b2e001784cbb15a838a1a42576c2935b44ca7c
-SHA1 (patch-src_promemul_dreamcast.cc) = eed1c7a713918ce782cf4c717758980038c8c065
-SHA1 (patch-src_promemul_ps2__bios.cc) = 17b4a27b61e588481e063c0ac509b55ad28a1127
-SHA1 (patch-src_symbol_symbol.cc) = 4edc42207d7c4af193b55fd4d9e03eee4180a7b2
+SHA1 (patch-src_devices_dev__sh4.cc) = 81e3dcc01934c71389a91861343bc8aa32284160
+SHA1 (patch-src_include_components_CPUDyntransComponent.h) = f60d31261a03a0a73fa4844143da4931cae85ce6
+SHA1 (patch-src_include_components_M88K__CPUComponent.h) = 5232386ac337c552d88cbdb829b6f0f3e94ba0f2
+SHA1 (patch-src_include_components_MIPS__CPUComponent.h) = 48bc9ea9dacbe7afd9734ee04e270943208db148
+SHA1 (patch-src_include_mips_cpu_types.h) = 04fff50fad3e619e7e0eeb8bf17a79edd18b2147
+SHA1 (patch-src_include_refcount__ptr.h) = 6c8742b199801c1db906d4856f6f5f01a0f25fe0
+SHA1 (patch-src_machines_machine__pmax.cc) = ed3fba7eacb593cbba082a6d8d8ec823bf90162f

Index: pkgsrc/emulators/gxemul/patches/patch-ad
diff -u pkgsrc/emulators/gxemul/patches/patch-ad:1.2 pkgsrc/emulators/gxemul/patches/patch-ad:1.3
--- pkgsrc/emulators/gxemul/patches/patch-ad:1.2        Wed Mar 21 17:39:42 2018
+++ pkgsrc/emulators/gxemul/patches/patch-ad    Fri Jan  4 13:35:16 2019
@@ -1,42 +1,11 @@
-$NetBSD: patch-ad,v 1.2 2018/03/21 17:39:42 kamil Exp $
+$NetBSD: patch-ad,v 1.3 2019/01/04 13:35:16 ryoon Exp $
 
 patch to fix big-endian mips support from matt%netbsd.org@localhost
-Fix C++11 literals.
 
 diff -rup src/cpus/cpu_mips_coproc.cc src/cpus/cpu_mips_coproc.cc
---- src/cpus/cpu_mips_coproc.cc.orig   2014-08-17 08:45:15.000000000 +0000
+--- src/cpus/cpu_mips_coproc.cc.orig   2018-12-07 06:29:22.000000000 +0000
 +++ src/cpus/cpu_mips_coproc.cc
-@@ -1628,19 +1628,19 @@ void coproc_tlbwri(struct cpu *cpu, int 
-       /*  Debug dump of the previous entry at that index:  */
-       fatal("{ old TLB entry at index %02x:", index);
-       if (cpu->cd.mips.cpu_type.mmu_model == MMU3K) {
--              fatal(" hi=%08"PRIx32, (uint32_t)cp->tlbs[index].hi);
--              fatal(" lo=%08"PRIx32, (uint32_t)cp->tlbs[index].lo0);
-+              fatal(" hi=%08" PRIx32, (uint32_t)cp->tlbs[index].hi);
-+              fatal(" lo=%08" PRIx32, (uint32_t)cp->tlbs[index].lo0);
-       } else {
-               if (cpu->is_32bit) {
--                      fatal(" mask=%08"PRIx32,(uint32_t)cp->tlbs[index].mask);
--                      fatal(" hi=%08"PRIx32, (uint32_t)cp->tlbs[index].hi);
--                      fatal(" lo0=%08"PRIx32, (uint32_t)cp->tlbs[index].lo0);
--                      fatal(" lo1=%08"PRIx32, (uint32_t)cp->tlbs[index].lo1);
-+                      fatal(" mask=%08" PRIx32,(uint32_t)cp->tlbs[index].mask);
-+                      fatal(" hi=%08" PRIx32, (uint32_t)cp->tlbs[index].hi);
-+                      fatal(" lo0=%08" PRIx32, (uint32_t)cp->tlbs[index].lo0);
-+                      fatal(" lo1=%08" PRIx32, (uint32_t)cp->tlbs[index].lo1);
-               } else {
--                      fatal(" mask=%016"PRIx64, cp->tlbs[index].mask);
--                      fatal(" hi=%016"PRIx64, cp->tlbs[index].hi);
--                      fatal(" lo0=%016"PRIx64, cp->tlbs[index].lo0);
--                      fatal(" lo1=%016"PRIx64, cp->tlbs[index].lo1);
-+                      fatal(" mask=%016" PRIx64, cp->tlbs[index].mask);
-+                      fatal(" hi=%016" PRIx64, cp->tlbs[index].hi);
-+                      fatal(" lo0=%016" PRIx64, cp->tlbs[index].lo0);
-+                      fatal(" lo1=%016" PRIx64, cp->tlbs[index].lo1);
-               }
-       }
-       fatal(" }\n");
-@@ -1993,6 +1993,13 @@ void coproc_function(struct cpu *cpu, st
+@@ -2029,6 +2029,13 @@ void coproc_function(struct cpu *cpu, st
  
        if (cpnr < 2 && (((function & 0x03e007f8) == (COPz_MTCz << 21))
                      || ((function & 0x03e007f8) == (COPz_DMTCz << 21)))) {
@@ -50,7 +19,7 @@ diff -rup src/cpus/cpu_mips_coproc.cc sr
                if (unassemble_only) {
                        debug("%s%i\t%s,", copz==COPz_DMTCz? "dmtc" : "mtc",
                            cpnr, regnames[rt]);
-@@ -2002,16 +2009,10 @@ void coproc_function(struct cpu *cpu, st
+@@ -2038,16 +2045,10 @@ void coproc_function(struct cpu *cpu, st
                                debug("r%i", rd);
                        if (function & 7)
                                debug(",%i", (int)(function & 7));
@@ -68,16 +37,3 @@ diff -rup src/cpus/cpu_mips_coproc.cc sr
                coproc_register_write(cpu, cpu->cd.mips.coproc[cpnr], rd,
                    &tmpvalue, copz == COPz_DMTCz, function & 7);
                return;
-@@ -2225,10 +2226,9 @@ void coproc_function(struct cpu *cpu, st
-               return;
-       }
- 
--      fatal("cpu%i: UNIMPLEMENTED coproc%i function %08"PRIx32" "
--          "(pc = %016"PRIx64")\n", cpu->cpu_id, cp->coproc_nr,
-+      fatal("cpu%i: UNIMPLEMENTED coproc%i function %08" PRIx32 " "
-+          "(pc = %016" PRIx64 ")\n", cpu->cpu_id, cp->coproc_nr,
-           (uint32_t)function, cpu->pc);
- 
-       mips_cpu_exception(cpu, EXCEPTION_CPU, 0, 0, cp->coproc_nr, 0, 0, 0);
- }
--
Index: pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu_mips.cc
diff -u pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu_mips.cc:1.2 pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu_mips.cc:1.3
--- pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu_mips.cc:1.2      Wed Mar 21 17:39:42 2018
+++ pkgsrc/emulators/gxemul/patches/patch-src_cpus_cpu_mips.cc  Fri Jan  4 13:35:16 2019
@@ -1,168 +1,10 @@
-$NetBSD: patch-src_cpus_cpu_mips.cc,v 1.2 2018/03/21 17:39:42 kamil Exp $
+$NetBSD: patch-src_cpus_cpu_mips.cc,v 1.3 2019/01/04 13:35:16 ryoon Exp $
 
 implement trap with immediate instructions present in MIPS32.
 
-Fix C++11 literals.
-
---- src/cpus/cpu_mips.cc.orig  2014-08-17 08:45:15.000000000 +0000
+--- src/cpus/cpu_mips.cc.orig  2018-12-07 06:29:22.000000000 +0000
 +++ src/cpus/cpu_mips.cc
-@@ -514,13 +514,13 @@ void mips_cpu_tlbdump(struct machine *m,
-                                   (int) cop0->reg[COP0_INDEX],
-                                   (int) cop0->reg[COP0_RANDOM]);
-                       else
--                              printf("index=0x%016"PRIx64
--                                  " random=0x%016"PRIx64,
-+                              printf("index=0x%016" PRIx64
-+                                  " random=0x%016" PRIx64,
-                                   (uint64_t) cop0->reg[COP0_INDEX],
-                                   (uint64_t) cop0->reg[COP0_RANDOM]);
- 
-                       if (m->cpus[i]->cd.mips.cpu_type.isa_level >= 3)
--                              printf(" wired=0x%"PRIx64,
-+                              printf(" wired=0x%" PRIx64,
-                                   (uint64_t) cop0->reg[COP0_WIRED]);
- 
-                       printf(")\n");
-@@ -529,22 +529,22 @@ void mips_cpu_tlbdump(struct machine *m,
-                           nr_of_tlb_entries; j++) {
-                               if (m->cpus[i]->cd.mips.cpu_type.mmu_model ==
-                                   MMU3K)
--                                      printf("%3i: hi=0x%08"PRIx32" lo=0x%08"
--                                          PRIx32"\n", j,
-+                                      printf("%3i: hi=0x%08" PRIx32 " lo=0x%08"
-+                                          PRIx32 "\n", j,
-                                           (uint32_t) cop0->tlbs[j].hi,
-                                           (uint32_t) cop0->tlbs[j].lo0);
-                               else if (m->cpus[i]->is_32bit)
--                                      printf("%3i: hi=0x%08"PRIx32" mask=0x"
--                                          "%08"PRIx32" lo0=0x%08"PRIx32
--                                          " lo1=0x%08"PRIx32"\n", j,
-+                                      printf("%3i: hi=0x%08" PRIx32 " mask=0x"
-+                                          "%08" PRIx32 " lo0=0x%08" PRIx32
-+                                          " lo1=0x%08" PRIx32 "\n", j,
-                                           (uint32_t) cop0->tlbs[j].hi,
-                                           (uint32_t) cop0->tlbs[j].mask,
-                                           (uint32_t) cop0->tlbs[j].lo0,
-                                           (uint32_t) cop0->tlbs[j].lo1);
-                               else
--                                      printf("%3i: hi=0x%016"PRIx64" mask="
--                                          "0x%016"PRIx64" lo0=0x%016"PRIx64
--                                          " lo1=0x%016"PRIx64"\n", j,
-+                                      printf("%3i: hi=0x%016" PRIx64 " mask="
-+                                          "0x%016" PRIx64 " lo0=0x%016" PRIx64
-+                                          " lo1=0x%016" PRIx64 "\n", j,
-                                           (uint64_t) cop0->tlbs[j].hi,
-                                           (uint64_t) cop0->tlbs[j].mask,
-                                           (uint64_t) cop0->tlbs[j].lo0,
-@@ -579,7 +579,7 @@ void mips_cpu_tlbdump(struct machine *m,
-               default:printf("index=0x%x random=0x%x",
-                           (int) (cop0->reg[COP0_INDEX] & INDEX_MASK),
-                           (int) (cop0->reg[COP0_RANDOM] & RANDOM_MASK));
--                      printf(" wired=0x%"PRIx64,
-+                      printf(" wired=0x%" PRIx64,
-                           (uint64_t) cop0->reg[COP0_WIRED]);
-               }
- 
-@@ -622,11 +622,11 @@ void mips_cpu_tlbdump(struct machine *m,
-                               break;
-                       default:switch (m->cpus[i]->cd.mips.cpu_type.mmu_model){
-                               case MMU32:
--                                      printf("vaddr=0x%08"PRIx32" ",
-+                                      printf("vaddr=0x%08" PRIx32 " ",
-                                           (uint32_t) (hi & ~mask));
-                                       break;
-                               default:/*  R4x00, R1x000, MIPS64, etc.  */
--                                      printf("vaddr=%016"PRIx64" ",
-+                                      printf("vaddr=%016" PRIx64 " ",
-                                           (uint64_t) (hi & ~mask));
-                               }
-                               if (hi & TLB_G)
-@@ -644,7 +644,7 @@ void mips_cpu_tlbdump(struct machine *m,
-                                       paddr >>= ENTRYLO_PFN_SHIFT;
-                                       paddr <<= pageshift;
-                                       paddr &= ~(mask >> 1);
--                                      printf(" p0=0x%09"PRIx64" ",
-+                                      printf(" p0=0x%09" PRIx64 " ",
-                                           (uint64_t) paddr);
-                               }
-                               printf(lo0 & ENTRYLO_D? "D" : " ");
-@@ -656,7 +656,7 @@ void mips_cpu_tlbdump(struct machine *m,
-                                       paddr >>= ENTRYLO_PFN_SHIFT;
-                                       paddr <<= pageshift;
-                                       paddr &= ~(mask >> 1);
--                                      printf(" p1=0x%09"PRIx64" ",
-+                                      printf(" p1=0x%09" PRIx64 " ",
-                                           (uint64_t) paddr);
-                               }
-                               printf(lo1 & ENTRYLO_D? "D" : " ");
-@@ -718,9 +718,9 @@ int mips_cpu_disassemble_instr(struct cp
-               debug("cpu%i: ", cpu->cpu_id);
- 
-       if (cpu->is_32bit)
--              debug("%08"PRIx32, (uint32_t)dumpaddr);
-+              debug("%08" PRIx32, (uint32_t)dumpaddr);
-       else
--              debug("%016"PRIx64, (uint64_t)dumpaddr);
-+              debug("%016" PRIx64, (uint64_t)dumpaddr);
- 
-       memcpy(instr, originstr, sizeof(uint32_t));
- 
-@@ -1008,9 +1008,9 @@ int mips_cpu_disassemble_instr(struct cp
-               }
- 
-               if (cpu->is_32bit)
--                      debug("0x%08"PRIx32, (uint32_t)addr);
-+                      debug("0x%08" PRIx32, (uint32_t)addr);
-               else
--                      debug("0x%016"PRIx64, (uint64_t)addr);
-+                      debug("0x%016" PRIx64, (uint64_t)addr);
- 
-               symbol = get_symbol_name(&cpu->machine->symbol_context,
-                   addr, &offset);
-@@ -1187,7 +1187,7 @@ int mips_cpu_disassemble_instr(struct cp
-                           rt, imm, regnames[rs]);
- 
-                       if (running) {
--                              debug("\t[0x%016"PRIx64" = %s]",
-+                              debug("\t[0x%016" PRIx64 " = %s]",
-                                   (uint64_t)(cpu->cd.mips.gpr[rs] + imm));
-                               if (symbol != NULL)
-                                       debug(" = %s", symbol);
-@@ -1212,10 +1212,10 @@ int mips_cpu_disassemble_instr(struct cp
-                       debug("\t[");
- 
-                       if (cpu->is_32bit)
--                              debug("0x%08"PRIx32,
-+                              debug("0x%08" PRIx32,
-                                   (uint32_t) (cpu->cd.mips.gpr[rs] + imm));
-                       else
--                              debug("0x%016"PRIx64,
-+                              debug("0x%016" PRIx64,
-                                   (uint64_t) (cpu->cd.mips.gpr[rs] + imm));
- 
-                       if (symbol != NULL)
-@@ -1239,9 +1239,9 @@ int mips_cpu_disassemble_instr(struct cp
-                   addr, &offset);
-               debug("%s\t0x", hi6_names[hi6]);
-               if (cpu->is_32bit)
--                      debug("%08"PRIx32, (uint32_t) addr);
-+                      debug("%08" PRIx32, (uint32_t) addr);
-               else
--                      debug("%016"PRIx64, (uint64_t) addr);
-+                      debug("%016" PRIx64, (uint64_t) addr);
-               if (symbol != NULL)
-                       debug("\t<%s>", symbol);
-               break;
-@@ -1281,7 +1281,7 @@ int mips_cpu_disassemble_instr(struct cp
-               if (cache_op==6)        debug("hit writeback");
-               if (cache_op==7)        debug("hit set virtual");
-               if (running)
--                      debug(", addr 0x%016"PRIx64,
-+                      debug(", addr 0x%016" PRIx64,
-                           (uint64_t)(cpu->cd.mips.gpr[rt] + imm));
-               if (showtag)
-               debug(", taghi=%08lx lo=%08lx",
-@@ -1457,14 +1457,20 @@ int mips_cpu_disassemble_instr(struct cp
+@@ -1462,6 +1462,12 @@ int mips_cpu_disassemble_instr(struct cp
                case REGIMM_BLTZALL:
                case REGIMM_BGEZAL:
                case REGIMM_BGEZALL:
@@ -175,164 +17,3 @@ Fix C++11 literals.
                        debug("%s\t%s,", regimm_names[regimm5], regnames[rs]);
  
                        addr = (dumpaddr + 4) + (imm << 2);
- 
-                       if (cpu->is_32bit)
--                              debug("0x%08"PRIx32, (uint32_t) addr);
-+                              debug("0x%08" PRIx32, (uint32_t) addr);
-                       else
--                              debug("0x%016"PRIx64, (uint64_t) addr);
-+                              debug("0x%016" PRIx64, (uint64_t) addr);
-                       break;
- 
-               case REGIMM_SYNCI:
-@@ -1509,30 +1515,30 @@ void mips_cpu_register_dump(struct cpu *
-                   cpu->pc, &offset);
- 
-               if (bits32)
--                      debug("cpu%i:  pc = %08"PRIx32,
-+                      debug("cpu%i:  pc = %08" PRIx32,
-                           cpu->cpu_id, (uint32_t) cpu->pc);
-               else if (bits128)
--                      debug("cpu%i:  pc=%016"PRIx64,
-+                      debug("cpu%i:  pc=%016" PRIx64,
-                           cpu->cpu_id, (uint64_t) cpu->pc);
-               else
--                      debug("cpu%i:    pc = 0x%016"PRIx64,
-+                      debug("cpu%i:    pc = 0x%016" PRIx64,
-                           cpu->cpu_id, (uint64_t) cpu->pc);
- 
-               debug("    <%s>\n", symbol != NULL? symbol :
-                   " no symbol ");
- 
-               if (bits32)
--                      debug("cpu%i:  hi = %08"PRIx32"  lo = %08"PRIx32"\n",
-+                      debug("cpu%i:  hi = %08" PRIx32 "  lo = %08" PRIx32 "\n",
-                           cpu->cpu_id, (uint32_t) cpu->cd.mips.hi,
-                           (uint32_t) cpu->cd.mips.lo);
-               else if (bits128) {
--                      debug("cpu%i:  hi=%016"PRIx64"%016"PRIx64"  lo="
--                          "%016"PRIx64"%016"PRIx64"\n", cpu->cpu_id,
-+                      debug("cpu%i:  hi=%016" PRIx64 "%016" PRIx64 "  lo="
-+                          "%016" PRIx64 "%016" PRIx64 "\n", cpu->cpu_id,
-                           cpu->cd.mips.hi1, cpu->cd.mips.hi,
-                           cpu->cd.mips.lo1, cpu->cd.mips.lo);
-               } else {
--                      debug("cpu%i:    hi = 0x%016"PRIx64"    lo = 0x%016"
--                          PRIx64"\n", cpu->cpu_id,
-+                      debug("cpu%i:    hi = 0x%016" PRIx64 "    lo = 0x%016"
-+                          PRIx64 "\n", cpu->cpu_id,
-                           (uint64_t) cpu->cd.mips.hi,
-                           (uint64_t) cpu->cd.mips.lo);
-               }
-@@ -1548,7 +1554,7 @@ void mips_cpu_register_dump(struct cpu *
-                                       debug("                           "
-                                           "          ");
-                               else
--                                      debug(" %3s=%016"PRIx64"%016"PRIx64,
-+                                      debug(" %3s=%016" PRIx64 "%016" PRIx64,
-                                           regnames[r], (uint64_t)
-                                           cpu->cd.mips.gpr_quadhi[r],
-                                           (uint64_t)cpu->cd.mips.gpr[r]);
-@@ -1563,7 +1569,7 @@ void mips_cpu_register_dump(struct cpu *
-                               if (i == MIPS_GPR_ZERO)
-                                       debug("               ");
-                               else
--                                      debug(" %3s = %08"PRIx32, regnames[i],
-+                                      debug(" %3s = %08" PRIx32, regnames[i],
-                                           (uint32_t)cpu->cd.mips.gpr[i]);
-                               if ((i & 3) == 3)
-                                       debug("\n");
-@@ -1577,7 +1583,7 @@ void mips_cpu_register_dump(struct cpu *
-                               if (r == MIPS_GPR_ZERO)
-                                       debug("                           ");
-                               else
--                                      debug("   %3s = 0x%016"PRIx64,
-+                                      debug("   %3s = 0x%016" PRIx64,
-                                           regnames[r],
-                                           (uint64_t)cpu->cd.mips.gpr[r]);
-                               if ((i & 1) == 1)
-@@ -1622,7 +1628,7 @@ void mips_cpu_register_dump(struct cpu *
-                                           (int) cpu->cd.mips.coproc[
-                                           coprocnr]->reg[i]);
-                               else
--                                      debug(" = 0x%016"PRIx64, (uint64_t)
-+                                      debug(" = 0x%016" PRIx64, (uint64_t)
-                                           cpu->cd.mips.coproc[
-                                           coprocnr]->reg[i]);
-                       }
-@@ -1640,10 +1646,10 @@ void mips_cpu_register_dump(struct cpu *
-                       debug("cpu%i: ", cpu->cpu_id);
-                       debug("config_select1 = 0x");
-                       if (cpu->is_32bit)
--                              debug("%08"PRIx32,
-+                              debug("%08" PRIx32,
-                                   (uint32_t)cpu->cd.mips.cop0_config_select1);
-                       else
--                              debug("%016"PRIx64,
-+                              debug("%016" PRIx64,
-                                   (uint64_t)cpu->cd.mips.cop0_config_select1);
-                       debug("\n");
-               }
-@@ -1673,7 +1679,7 @@ void mips_cpu_register_dump(struct cpu *
- 
-       if (cpu->cd.mips.rmw) {
-               printf("cpu%i: Read-Modify-Write in progress, address "
--                  "0x%016"PRIx64"\n", cpu->cpu_id, cpu->cd.mips.rmw_addr);
-+                  "0x%016" PRIx64 "\n", cpu->cpu_id, cpu->cd.mips.rmw_addr);
-       }
- }
- 
-@@ -1764,10 +1770,10 @@ void mips_cpu_exception(struct cpu *cpu,
-                                           d, strbuf, sizeof(strbuf)));
-                               } else {
-                                       if (cpu->is_32bit)
--                                              debug(" a%i=0x%"PRIx32, x,
-+                                              debug(" a%i=0x%" PRIx32, x,
-                                                   (uint32_t)d);
-                                       else
--                                              debug(" a%i=0x%"PRIx64, x,
-+                                              debug(" a%i=0x%" PRIx64, x,
-                                                   (uint64_t)d);
-                               }
-                       }
-@@ -1781,13 +1787,13 @@ void mips_cpu_exception(struct cpu *cpu,
-                       if (cpu->is_32bit)
-                               debug(" vaddr=0x%08x", (int)vaddr);
-                       else
--                              debug(" vaddr=0x%016"PRIx64, (uint64_t)vaddr);
-+                              debug(" vaddr=0x%016" PRIx64, (uint64_t)vaddr);
-               }
- 
-               if (cpu->is_32bit)
--                      debug(" pc=0x%08"PRIx32" ", (uint32_t)cpu->pc);
-+                      debug(" pc=0x%08" PRIx32" ", (uint32_t)cpu->pc);
-               else
--                      debug(" pc=0x%016"PRIx64" ", (uint64_t)cpu->pc);
-+                      debug(" pc=0x%016" PRIx64" ", (uint64_t)cpu->pc);
- 
-               if (symbol != NULL)
-                       debug("<%s> ]\n", symbol);
-@@ -1804,14 +1810,14 @@ void mips_cpu_exception(struct cpu *cpu,
-                       fatal("cpu%i: ", cpu->cpu_id);
-               fatal("warning: LOW reference: vaddr=");
-               if (cpu->is_32bit)
--                      fatal("0x%08"PRIx32, (uint32_t) vaddr);
-+                      fatal("0x%08" PRIx32, (uint32_t) vaddr);
-               else
--                      fatal("0x%016"PRIx64, (uint64_t) vaddr);
-+                      fatal("0x%016" PRIx64, (uint64_t) vaddr);
-               fatal(", exception %s, pc=", exception_names[exccode]);
-               if (cpu->is_32bit)
--                      fatal("0x%08"PRIx32, (uint32_t) cpu->pc);
-+                      fatal("0x%08" PRIx32, (uint32_t) cpu->pc);
-               else
--                      fatal("0x%016"PRIx64, (uint64_t)cpu->pc);
-+                      fatal("0x%016" PRIx64, (uint64_t)cpu->pc);
-               fatal(" <%s> ]\n", symbol? symbol : "(no symbol)");
-       }
- 
-@@ -1974,4 +1980,3 @@ void mips_cpu_exception(struct cpu *cpu,
- 
- 
- #include "tmp_mips_tail.cc"
--
Index: pkgsrc/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h
diff -u pkgsrc/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h:1.2 pkgsrc/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h:1.3
--- pkgsrc/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h:1.2      Mon Sep  4 11:19:43 2017
+++ pkgsrc/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h  Fri Jan  4 13:35:16 2019
@@ -1,9 +1,9 @@
-$NetBSD: patch-src_include_mips_cpu_types.h,v 1.2 2017/09/04 11:19:43 ryoon Exp $
+$NetBSD: patch-src_include_mips_cpu_types.h,v 1.3 2019/01/04 13:35:16 ryoon Exp $
 
 * Real MIPS MALTA has no FPU.
 
---- src/include/mips_cpu_types.h.orig  2014-08-17 01:45:13.000000000 -0700
-+++ src/include/mips_cpu_types.h       2017-08-24 15:38:11.739142000 -0700
+--- src/include/mips_cpu_types.h.orig  2018-12-07 06:29:22.000000000 +0000
++++ src/include/mips_cpu_types.h
 @@ -98,10 +98,10 @@
        { "RM7900",     0x34 /*?*/,  0x0 /* ? */,DCOUNT,EXC4K, MMU4K,   4, 0,   64, 4,14,5,1,14,5,1,18, 6, 1 }, /*  instrs/cycle? cachelinesize? assoc = 4ways for all  */ \
        { "RM9000",     0x34 /*?*/,  0x0 /* ? */,DCOUNT,EXC4K, MMU4K,   4, 0,   48, 4,14,5,1,14,5,1,18, 6, 1 }, /*  This is totally bogus  */ \
@@ -16,6 +16,6 @@ $NetBSD: patch-src_include_mips_cpu_type
 +      { "4KEc",       0x100+MIPS_4KEc_R2, 1,  NOFPU,  EXC32, MMU32,  32, 2,   16, 4,14,4,2,14,4,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
 +      { "5Kc",        0x100+MIPS_5Kc, 1,      NOFPU,  EXC64, MMU64,  64, 1,   48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
 +      { "5KE",        0x100+MIPS_5KE, 1,      NOFPU,  EXC64, MMU64,  64, 2,   48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
+       { "24KEc",      0x100+MIPS_24KE, 1,     0,      EXC32, MMU32,  32, 2,   32, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  revision level? DCOUNT? instrs/cycle? cache? BOGUS, TODO  */ \
        { "BCM4710",    0x000240,   0x00,       0,      EXC32, MMU32,  32, 1,   32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
        { "BCM4712",    0x000290,   0x07,       0,      EXC32, MMU32,  32, 1,   32, 2,13,4,1,12,4,1, 0, 0, 0 }, /*  2ways I, 2ways D  */ \
-       { "AU1000",     0x00302,    0x01,       0,      EXC32, MMU32,  32, 1,   32, 2,14,5,2,14,5,2, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
Index: pkgsrc/emulators/gxemul/patches/patch-src_include_refcount__ptr.h
diff -u pkgsrc/emulators/gxemul/patches/patch-src_include_refcount__ptr.h:1.2 pkgsrc/emulators/gxemul/patches/patch-src_include_refcount__ptr.h:1.3
--- pkgsrc/emulators/gxemul/patches/patch-src_include_refcount__ptr.h:1.2       Mon Dec  8 20:55:19 2014
+++ pkgsrc/emulators/gxemul/patches/patch-src_include_refcount__ptr.h   Fri Jan  4 13:35:16 2019
@@ -1,4 +1,6 @@
-$NetBSD: patch-src_include_refcount__ptr.h,v 1.2 2014/12/08 20:55:19 ryoon Exp $
+$NetBSD: patch-src_include_refcount__ptr.h,v 1.3 2019/01/04 13:35:16 ryoon Exp $
+
+Fix compilation on Linux.
 
 --- src/include/refcount_ptr.h.orig    2014-08-17 08:45:13.000000000 +0000
 +++ src/include/refcount_ptr.h
Index: pkgsrc/emulators/gxemul/patches/patch-src_machines_machine__pmax.cc
diff -u pkgsrc/emulators/gxemul/patches/patch-src_machines_machine__pmax.cc:1.2 pkgsrc/emulators/gxemul/patches/patch-src_machines_machine__pmax.cc:1.3
--- pkgsrc/emulators/gxemul/patches/patch-src_machines_machine__pmax.cc:1.2     Wed Mar 21 17:39:42 2018
+++ pkgsrc/emulators/gxemul/patches/patch-src_machines_machine__pmax.cc Fri Jan  4 13:35:17 2019
@@ -1,21 +1,10 @@
-$NetBSD: patch-src_machines_machine__pmax.cc,v 1.2 2018/03/21 17:39:42 kamil Exp $
+$NetBSD: patch-src_machines_machine__pmax.cc,v 1.3 2019/01/04 13:35:17 ryoon Exp $
 
 sd0 -> rz0 so we can find our boot device.
 
-Fix C++11 literals.
-
---- src/machines/machine_pmax.cc.orig  2014-08-17 08:45:14.000000000 +0000
+--- src/machines/machine_pmax.cc.orig  2018-12-07 06:29:22.000000000 +0000
 +++ src/machines/machine_pmax.cc
-@@ -660,7 +660,7 @@ abort();
- 
-               /*  KN230 mainbus / interrupt controller:  */
-               snprintf(tmpstr, sizeof(tmpstr),
--                  "kn230 addr=0x%"PRIx64, (uint64_t) KN230_SYS_ICSR);
-+                  "kn230 addr=0x%" PRIx64, (uint64_t) KN230_SYS_ICSR);
-               device_add(machine, tmpstr);
- 
-               /*
-@@ -789,7 +789,7 @@ abort();
+@@ -804,7 +804,7 @@ abort();
                        strlcpy(bootpath, "rz(0,0,0)", sizeof(bootpath));
                else
  #endif
@@ -24,34 +13,3 @@ Fix C++11 literals.
  
                if (machine->bootdev_id < 0 || machine->force_netboot) {
                        /*  tftp boot:  */
-@@ -885,7 +885,7 @@ abort();
-        */
-       {
-               char tmps[300];
--              snprintf(tmps, sizeof(tmps), "cca=%"PRIx32,
-+              snprintf(tmps, sizeof(tmps), "cca=%" PRIx32,
-                   (uint32_t) (DEC_DECCCA_BASEADDR + 0xa0000000ULL));
-               add_environment_string(cpu, tmps, &addr);
-       }
-@@ -898,14 +898,14 @@ abort();
-               tmps[sizeof(tmps)-1] = '\0';
-               add_environment_string(cpu, tmps, &addr);
- 
--              snprintf(tmps, sizeof(tmps), "bitmap=0x%"PRIx32, (uint32_t)
-+              snprintf(tmps, sizeof(tmps), "bitmap=0x%" PRIx32, (uint32_t)
-                   ( (DEC_MEMMAP_ADDR + sizeof(uint32_t) /* skip the
-                       page size and point to the memmap */
-                   ) & 0xffffffffULL) );
-               tmps[sizeof(tmps)-1] = '\0';
-               add_environment_string(cpu, tmps, &addr);
- 
--              snprintf(tmps, sizeof(tmps), "bitmaplen=0x%"PRIx32, (uint32_t)
-+              snprintf(tmps, sizeof(tmps), "bitmaplen=0x%" PRIx32, (uint32_t)
-                   ( machine->physical_ram_in_mb * 1048576 / 4096 / 8) );
-               tmps[sizeof(tmps)-1] = '\0';
-               add_environment_string(cpu, tmps, &addr);
-@@ -994,4 +994,3 @@ MACHINE_REGISTER(pmax)
- 
-       me->set_default_ram = machine_default_ram_pmax;
- }
--

Index: pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_CPUDyntransComponent.cc
diff -u pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_CPUDyntransComponent.cc:1.1 pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_CPUDyntransComponent.cc:1.2
--- pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_CPUDyntransComponent.cc:1.1        Fri Nov 23 12:33:22 2012
+++ pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_CPUDyntransComponent.cc    Fri Jan  4 13:35:16 2019
@@ -1,4 +1,6 @@
-$NetBSD: patch-src_components_cpu_CPUDyntransComponent.cc,v 1.1 2012/11/23 12:33:22 joerg Exp $
+$NetBSD: patch-src_components_cpu_CPUDyntransComponent.cc,v 1.2 2019/01/04 13:35:16 ryoon Exp $
+
+Don't define functions returning functions.
 
 --- src/components/cpu/CPUDyntransComponent.cc.orig    2012-11-19 20:12:27.000000000 +0000
 +++ src/components/cpu/CPUDyntransComponent.cc
Index: pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_M88K__CPUComponent.cc
diff -u pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_M88K__CPUComponent.cc:1.1 pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_M88K__CPUComponent.cc:1.2
--- pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_M88K__CPUComponent.cc:1.1  Fri Nov 23 12:33:22 2012
+++ pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_M88K__CPUComponent.cc      Fri Jan  4 13:35:16 2019
@@ -1,13 +1,15 @@
-$NetBSD: patch-src_components_cpu_M88K__CPUComponent.cc,v 1.1 2012/11/23 12:33:22 joerg Exp $
+$NetBSD: patch-src_components_cpu_M88K__CPUComponent.cc,v 1.2 2019/01/04 13:35:16 ryoon Exp $
 
---- src/components/cpu/M88K_CPUComponent.cc.orig       2010-02-14 09:33:54.000000000 +0000
+Don't define functions returning functions.
+
+--- src/components/cpu/M88K_CPUComponent.cc.orig       2018-12-07 06:29:22.000000000 +0000
 +++ src/components/cpu/M88K_CPUComponent.cc
 @@ -337,7 +337,7 @@ int M88K_CPUComponent::GetDyntransICshif
  }
  
  
--void (*M88K_CPUComponent::GetDyntransToBeTranslated())(CPUDyntransComponent*, DyntransIC*) const
-+DyntransIC_t M88K_CPUComponent::GetDyntransToBeTranslated() const
+-void (*M88K_CPUComponent::GetDyntransToBeTranslated())(CPUDyntransComponent*, DyntransIC*)
++DyntransIC_t M88K_CPUComponent::GetDyntransToBeTranslated()
  {
        return instr_ToBeTranslated;
  }
Index: pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_MIPS__CPUComponent.cc
diff -u pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_MIPS__CPUComponent.cc:1.1 pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_MIPS__CPUComponent.cc:1.2
--- pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_MIPS__CPUComponent.cc:1.1  Fri Nov 23 12:33:22 2012
+++ pkgsrc/emulators/gxemul/patches/patch-src_components_cpu_MIPS__CPUComponent.cc      Fri Jan  4 13:35:16 2019
@@ -1,13 +1,15 @@
-$NetBSD: patch-src_components_cpu_MIPS__CPUComponent.cc,v 1.1 2012/11/23 12:33:22 joerg Exp $
+$NetBSD: patch-src_components_cpu_MIPS__CPUComponent.cc,v 1.2 2019/01/04 13:35:16 ryoon Exp $
 
---- src/components/cpu/MIPS_CPUComponent.cc.orig       2012-11-19 20:12:23.000000000 +0000
+Don't define functions returning functions.
+
+--- src/components/cpu/MIPS_CPUComponent.cc.orig       2018-12-07 06:29:22.000000000 +0000
 +++ src/components/cpu/MIPS_CPUComponent.cc
 @@ -327,7 +327,7 @@ int MIPS_CPUComponent::GetDyntransICshif
  }
  
  
--void (*MIPS_CPUComponent::GetDyntransToBeTranslated())(CPUDyntransComponent*, DyntransIC*) const
-+DyntransIC_t MIPS_CPUComponent::GetDyntransToBeTranslated() const
+-void (*MIPS_CPUComponent::GetDyntransToBeTranslated())(CPUDyntransComponent*, DyntransIC*)
++DyntransIC_t MIPS_CPUComponent::GetDyntransToBeTranslated()
  {
        bool mips16 = m_pc & 1? true : false;
        return mips16? instr_ToBeTranslated_MIPS16 : instr_ToBeTranslated;
Index: pkgsrc/emulators/gxemul/patches/patch-src_include_components_CPUDyntransComponent.h
diff -u pkgsrc/emulators/gxemul/patches/patch-src_include_components_CPUDyntransComponent.h:1.1 pkgsrc/emulators/gxemul/patches/patch-src_include_components_CPUDyntransComponent.h:1.2
--- pkgsrc/emulators/gxemul/patches/patch-src_include_components_CPUDyntransComponent.h:1.1     Fri Nov 23 12:33:22 2012
+++ pkgsrc/emulators/gxemul/patches/patch-src_include_components_CPUDyntransComponent.h Fri Jan  4 13:35:16 2019
@@ -1,6 +1,8 @@
-$NetBSD: patch-src_include_components_CPUDyntransComponent.h,v 1.1 2012/11/23 12:33:22 joerg Exp $
+$NetBSD: patch-src_include_components_CPUDyntransComponent.h,v 1.2 2019/01/04 13:35:16 ryoon Exp $
 
---- src/include/components/CPUDyntransComponent.h.orig 2012-11-19 20:05:03.000000000 +0000
+Don't define functions returning functions.
+
+--- src/include/components/CPUDyntransComponent.h.orig 2018-12-07 06:29:22.000000000 +0000
 +++ src/include/components/CPUDyntransComponent.h
 @@ -47,9 +47,13 @@ class CPUDyntransComponent;
   * f points to a function to be executed.
@@ -21,8 +23,8 @@ $NetBSD: patch-src_include_components_CP
  protected:
        // Implemented by specific CPU families:
        virtual int GetDyntransICshift() const = 0;
--      virtual void (*GetDyntransToBeTranslated())(CPUDyntransComponent* cpu, DyntransIC* ic) const = 0;
-+      virtual DyntransIC_t GetDyntransToBeTranslated() const = 0;
+-      virtual void (*GetDyntransToBeTranslated())(CPUDyntransComponent* cpu, DyntransIC* ic) = 0;
++      virtual DyntransIC_t GetDyntransToBeTranslated() = 0;
  
        void DyntransToBeTranslatedBegin(struct DyntransIC*);
        bool DyntransReadInstruction(uint16_t& iword);
Index: pkgsrc/emulators/gxemul/patches/patch-src_include_components_M88K__CPUComponent.h
diff -u pkgsrc/emulators/gxemul/patches/patch-src_include_components_M88K__CPUComponent.h:1.1 pkgsrc/emulators/gxemul/patches/patch-src_include_components_M88K__CPUComponent.h:1.2
--- pkgsrc/emulators/gxemul/patches/patch-src_include_components_M88K__CPUComponent.h:1.1       Fri Nov 23 12:33:22 2012
+++ pkgsrc/emulators/gxemul/patches/patch-src_include_components_M88K__CPUComponent.h   Fri Jan  4 13:35:16 2019
@@ -1,13 +1,15 @@
-$NetBSD: patch-src_include_components_M88K__CPUComponent.h,v 1.1 2012/11/23 12:33:22 joerg Exp $
+$NetBSD: patch-src_include_components_M88K__CPUComponent.h,v 1.2 2019/01/04 13:35:16 ryoon Exp $
 
---- src/include/components/M88K_CPUComponent.h.orig    2012-11-19 20:10:14.000000000 +0000
+Don't define functions returning functions.
+
+--- src/include/components/M88K_CPUComponent.h.orig    2018-12-07 06:29:22.000000000 +0000
 +++ src/include/components/M88K_CPUComponent.h
 @@ -377,7 +377,7 @@ protected:
        virtual bool FunctionTraceReturnImpl(int64_t& retval) { retval = m_r[M88K_RETURN_VALUE_REG]; return true; }
  
        virtual int GetDyntransICshift() const;
--      virtual void (*GetDyntransToBeTranslated())(CPUDyntransComponent*, DyntransIC*) const;
-+      virtual DyntransIC_t GetDyntransToBeTranslated() const ;
+-      virtual void (*GetDyntransToBeTranslated())(CPUDyntransComponent*, DyntransIC*);
++      virtual DyntransIC_t GetDyntransToBeTranslated();
  
        virtual void ShowRegisters(GXemul* gxemul, const vector<string>& arguments) const;
  
Index: pkgsrc/emulators/gxemul/patches/patch-src_include_components_MIPS__CPUComponent.h
diff -u pkgsrc/emulators/gxemul/patches/patch-src_include_components_MIPS__CPUComponent.h:1.1 pkgsrc/emulators/gxemul/patches/patch-src_include_components_MIPS__CPUComponent.h:1.2
--- pkgsrc/emulators/gxemul/patches/patch-src_include_components_MIPS__CPUComponent.h:1.1       Fri Nov 23 12:33:22 2012
+++ pkgsrc/emulators/gxemul/patches/patch-src_include_components_MIPS__CPUComponent.h   Fri Jan  4 13:35:16 2019
@@ -1,13 +1,15 @@
-$NetBSD: patch-src_include_components_MIPS__CPUComponent.h,v 1.1 2012/11/23 12:33:22 joerg Exp $
+$NetBSD: patch-src_include_components_MIPS__CPUComponent.h,v 1.2 2019/01/04 13:35:16 ryoon Exp $
 
---- src/include/components/MIPS_CPUComponent.h.orig    2012-11-19 20:10:20.000000000 +0000
+Don't define functions returning functions.
+
+--- src/include/components/MIPS_CPUComponent.h.orig    2018-12-07 06:29:22.000000000 +0000
 +++ src/include/components/MIPS_CPUComponent.h
 @@ -196,7 +196,7 @@ protected:
        virtual bool FunctionTraceReturnImpl(int64_t& retval);
  
        virtual int GetDyntransICshift() const;
--      virtual void (*GetDyntransToBeTranslated())(CPUDyntransComponent*, DyntransIC*) const;
-+      virtual DyntransIC_t GetDyntransToBeTranslated() const;
+-      virtual void (*GetDyntransToBeTranslated())(CPUDyntransComponent*, DyntransIC*);
++      virtual DyntransIC_t GetDyntransToBeTranslated();
  
        virtual void ShowRegisters(GXemul* gxemul, const vector<string>& arguments) const;
  

Index: pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__sh4.cc
diff -u pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__sh4.cc:1.3 pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__sh4.cc:1.4
--- pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__sh4.cc:1.3   Wed Mar 21 17:39:42 2018
+++ pkgsrc/emulators/gxemul/patches/patch-src_devices_dev__sh4.cc       Fri Jan  4 13:35:16 2019
@@ -1,114 +1,10 @@
-$NetBSD: patch-src_devices_dev__sh4.cc,v 1.3 2018/03/21 17:39:42 kamil Exp $
+$NetBSD: patch-src_devices_dev__sh4.cc,v 1.4 2019/01/04 13:35:16 ryoon Exp $
 
 Put the actual number of characters waiting in the FIFO instead of 1 or 0
 
-Fix C++11 literals.
-
---- src/devices/dev_sh4.cc.orig        2014-08-17 08:45:12.000000000 +0000
+--- src/devices/dev_sh4.cc.orig        2018-12-07 06:29:22.000000000 +0000
 +++ src/devices/dev_sh4.cc
-@@ -844,7 +844,7 @@ DEVICE_ACCESS(sh4_pcic)
-               /*  Hardcoded to what OpenBSD/landisk uses:  */
-               if (writeflag == MEM_WRITE && idata != 0xac000000) {
-                       fatal("sh4_pcic: SH4_PCICONF5 unknown value"
--                          " 0x%"PRIx32"\n", (uint32_t) idata);
-+                          " 0x%" PRIx32 "\n", (uint32_t) idata);
-                       exit(1);
-               }
-               break;
-@@ -853,7 +853,7 @@ DEVICE_ACCESS(sh4_pcic)
-               /*  Hardcoded to what OpenBSD/landisk uses:  */
-               if (writeflag == MEM_WRITE && idata != 0x8c000000) {
-                       fatal("sh4_pcic: SH4_PCICONF6 unknown value"
--                          " 0x%"PRIx32"\n", (uint32_t) idata);
-+                          " 0x%" PRIx32 "\n", (uint32_t) idata);
-                       exit(1);
-               }
-               break;
-@@ -862,7 +862,7 @@ DEVICE_ACCESS(sh4_pcic)
-               /*  Hardcoded to what OpenBSD/landisk uses:  */
-               if (writeflag == MEM_WRITE && idata != ((64 - 1) << 20)) {
-                       fatal("sh4_pcic: SH4_PCILSR0 unknown value"
--                          " 0x%"PRIx32"\n", (uint32_t) idata);
-+                          " 0x%" PRIx32 "\n", (uint32_t) idata);
-                       exit(1);
-               }
-               break;
-@@ -871,7 +871,7 @@ DEVICE_ACCESS(sh4_pcic)
-               /*  Hardcoded to what OpenBSD/landisk uses:  */
-               if (writeflag == MEM_WRITE && idata != 0xac000000) {
-                       fatal("sh4_pcic: SH4_PCILAR0 unknown value"
--                          " 0x%"PRIx32"\n", (uint32_t) idata);
-+                          " 0x%" PRIx32 "\n", (uint32_t) idata);
-                       exit(1);
-               }
-               break;
-@@ -880,7 +880,7 @@ DEVICE_ACCESS(sh4_pcic)
-               /*  Hardcoded to what OpenBSD/landisk uses:  */
-               if (writeflag == MEM_WRITE && idata != ((64 - 1) << 20)) {
-                       fatal("sh4_pcic: SH4_PCILSR1 unknown value"
--                          " 0x%"PRIx32"\n", (uint32_t) idata);
-+                          " 0x%" PRIx32 "\n", (uint32_t) idata);
-                       exit(1);
-               }
-               break;
-@@ -889,15 +889,15 @@ DEVICE_ACCESS(sh4_pcic)
-               /*  Hardcoded to what OpenBSD/landisk uses:  */
-               if (writeflag == MEM_WRITE && idata != 0xac000000) {
-                       fatal("sh4_pcic: SH4_PCILAR1 unknown value"
--                          " 0x%"PRIx32"\n", (uint32_t) idata);
-+                          " 0x%" PRIx32 "\n", (uint32_t) idata);
-                       exit(1);
-               }
-               break;
- 
-       case SH4_PCIMBR:
-               if (writeflag == MEM_WRITE && idata != SH4_PCIC_MEM) {
--                      fatal("sh4_pcic: PCIMBR set to 0x%"PRIx32", not"
--                          " 0x%"PRIx32"? TODO\n", (uint32_t) idata,
-+                      fatal("sh4_pcic: PCIMBR set to 0x%" PRIx32 ", not"
-+                          " 0x%" PRIx32 "? TODO\n", (uint32_t) idata,
-                           (uint32_t) SH4_PCIC_MEM);
-                       exit(1);
-               }
-@@ -905,8 +905,8 @@ DEVICE_ACCESS(sh4_pcic)
- 
-       case SH4_PCIIOBR:
-               if (writeflag == MEM_WRITE && idata != SH4_PCIC_IO) {
--                      fatal("sh4_pcic: PCIIOBR set to 0x%"PRIx32", not"
--                          " 0x%"PRIx32"? TODO\n", (uint32_t) idata,
-+                      fatal("sh4_pcic: PCIIOBR set to 0x%" PRIx32 ", not"
-+                          " 0x%" PRIx32 "? TODO\n", (uint32_t) idata,
-                           (uint32_t) SH4_PCIC_IO);
-                       exit(1);
-               }
-@@ -982,7 +982,7 @@ DEVICE_ACCESS(sh4)
-                       d->sdmr3 = v;
-               else
-                       d->sdmr2 = v;
--              debug("[ sh4: sdmr%i set to 0x%04"PRIx16" ]\n",
-+              debug("[ sh4: sdmr%i set to 0x%04" PRIx16 " ]\n",
-                   relative_addr & 0x00040000? 3 : 2, v);
-               return 1;
-       }
-@@ -1235,7 +1235,7 @@ DEVICE_ACCESS(sh4)
-                       if (idata & (TCR_ICPF | TCR_ICPE1 | TCR_ICPE0 |
-                           TCR_CKEG1 | TCR_CKEG0 | TCR_TPSC2)) {
-                               fatal("Unimplemented SH4 timer control"
--                                  " bits: 0x%08"PRIx32". Aborting.\n",
-+                                  " bits: 0x%08" PRIx32 ". Aborting.\n",
-                                   (int) idata);
-                               exit(1);
-                       }
-@@ -1299,7 +1299,7 @@ DEVICE_ACCESS(sh4)
-                       if (idata & ~0x00ffffff) {
-                               fatal("[ SH4 DMA: Attempt to set top 8 "
-                                   "bits of the count register? 0x%08"
--                                  PRIx32" ]\n", (uint32_t) idata);
-+                                  PRIx32 " ]\n", (uint32_t) idata);
-                               exit(1);
-                       }
- 
-@@ -1703,8 +1703,8 @@ DEVICE_ACCESS(sh4)
+@@ -1715,8 +1715,8 @@ DEVICE_ACCESS(sh4)
  
        case SH4_SCIF_BASE + SCIF_FDR:
                /*  Nr of bytes in the TX and RX fifos, respectively:  */
@@ -119,8 +15,3 @@ Fix C++11 literals.
                break;
  
        case SH4_SCIF_BASE + SCIF_SPTR:
-@@ -2000,4 +2000,3 @@ DEVINIT(sh4)
- 
-       return 1;
- }
--



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