Subject: CVS commit: pkgsrc/cad/verilog-current
To: None <pkgsrc-changes@NetBSD.org>
From: Matthias Drochner <drochner@netbsd.org>
List: pkgsrc-changes
Date: 07/14/2003 09:51:50
Module Name:	pkgsrc
Committed By:	drochner
Date:		Mon Jul 14 09:51:49 UTC 2003

Modified Files:
	pkgsrc/cad/verilog-current: Makefile PLIST distinfo
	pkgsrc/cad/verilog-current/patches: patch-ad

Log Message:
update to snapshot "20030705".
There was a couple of snapshots since february; besides bugfixes the
major highligths might be:
-handling of real values at various places
-support for library modules (esp cadence PLI1)
-better FPGA support (esp Virtex II)
-"vvp" interactive mode added

Also converted to buildlink2, and dependencies to libz, libbz2 and
readline added.


To generate a diff of this commit:
cvs rdiff -r1.32 -r1.33 pkgsrc/cad/verilog-current/Makefile
cvs rdiff -r1.4 -r1.5 pkgsrc/cad/verilog-current/PLIST
cvs rdiff -r1.16 -r1.17 pkgsrc/cad/verilog-current/distinfo
cvs rdiff -r1.11 -r1.12 pkgsrc/cad/verilog-current/patches/patch-ad

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.