On Mon, Apr 30, 2001 at 01:41:59PM -0700, Bri wrote:
> On Mon, 30 Apr 2001 wojtek@3miasto.net wrote:
> 
> > unfortunately no. the ware some posts about performance problems with many
> > IDE disks even on separate controllers. it's because IDE chip saturates
> > completely PCI bus when transferring data so making CPU stalls when it
> > tries to send command to another IDE chip
> 
>  If the IDE device is saturating the PCI bus transferring 33megs/second of
> data woulden't you think a SCSI controller transferring 33megs/second of
> data would do that as well?

Depends on the device. The problem is that some IDE controllers don't have
large enouth FIFO, so it may grab the PCI bus (thus preventing other devices
from using it) but not transfering data. Yes, with a poolry-designed SCSI
controller you'll have the same problem. With a good IDE or SCSI controller
you don't have this problem.

It's just that there may be more bad IDE than SCSI controllers around :)

> 
>  And as an aside, lots of newer IDE controllers don't rely on the CPU
> nearley as much as old implimentations did.

This didn't change much over time: all IDE controllers relies on the same IDE
DMA spec. Some of them may need extra reg read/write to ask interrupt, or
check interrupt status but this doesn't count that much.

Of course, if you're talking about PIO IDE controllers, it's different.
But all PCI IDE controllers produced in the last years can do DMA.

--
Manuel Bouyer <bouyer@antioche.eu.org>
--