Subject: re: i960 revisited
To: None <firstname.lastname@example.org>
From: M L Riechers Mlr <email@example.com>
Date: 04/29/2003 22:36:46
On Tue, 29 Apr 2003 20:29:46 +0200 Iggy Drougge <firstname.lastname@example.org>
> Also of note, the NeoStation 200 has got a PowerPC 821 processor. Is
> this one of the braindamaged PPCs?
The "PowerPC 821" is the Motorola mpc821. It is a derivative of the
mpc860 "power quad," or something like that, which is, in turn, a
derivative of the 68360 "quad communications controller," or something
like that. The mpc860 is PowerPC core based, minus the floating point
unit and seg registers, but has an mmu structure somewhat like the
68030 or 68040. The mpc860 and its derivatives are known collectively
as the mpc core, because they all (more or less) share the same CPU
core. The 68360 is 68000 based, likewise has no floating point, but
also has no mmu. Hence the 68360 is not a likely candidate for a
NetBSD port, but the mpc860 is.
The main selling point of the "quad" processors is an independent
"risc" cpu which controls the on-board peripherals. (Calling the
communications processor _the_ "risc" processor, when the mpc860
PowerPC already is one, gives one a bit of brain-twist. Oh, well.)
This "risc" processor is a co-processor to the 68000 or PowerPC core,
and effectively turns all of the on-board peripherals into dma type
devices. The quad processors will typically have one to four serial
ports which may be configured as Ethernet 10 mbit ports, bisync ports
to 1.5 mbit/sec, HDLC ports, specialized industrial type bus ports,
and teletype ports, two more teletype ports, a SPI port, a I2C port,
dma parallel, centronics, PCMCIA, and other things, because I've run
out of breath. The "quad" processors typically have "glue-less" DRAM
logic interface and control, as well as static RAM and ROM
Some mpc860 derivatives have CRT and LCD panel controllers, and ide
disc controllers, while some of the up-scale (mpc8260+??) chips
support PCI busses and stuff like that.
The mpc821 was a big chip -- AIR it had something like a 400 pin ball
grid array. Its major claim to fame was the ability to control and
graphic display on an LCD (up to about 1280 x 1024 --- if you like
slow). AIR it didn't do CRT's. So it was big, expensive, and
sacrificed two SCC's to the LCD, and Motorola End-of-Life'd it last
December (or was it December 2001? Time flies when your having fun.)
It is replaced by the mpc823, which is a smaller chip --- only 256
ball grid array --- can control both an LCD and CRT (tho not at the
same time) and only one-third the cost of the mpc821.
Programming should be pretty much interchangeable between the mpc821
and mpc823, and, except for peripheral switcheroos, the mpc860.
Braindamaged? That's in the eye of the beholder.
Lack of floating point support will only bother you if you think you
need it (you don't), or if you use the GNU gcc compiler (DUCK
QUICK!!!!) prior to version 3.3. Don't ask. And no, gcc 3.3 is not
yet officially released.
The mpc core prior to version something-or-other has a corner case
that I'm sure has gotten me. However, there is a gcc compiler
work-around for it.
There is no cache snoop on the mpc core, so enabling the data and
instruction caches is a bit tricky. I've enabled both the data and
instruction cache for supervisor mode, but not for use mode. And no,
the general PowerPC kernel programming doesn't necessarily work for
the mpc core, even though the mpc core seems to have the same
instructions and facilities. But what do you want for one tenth the
cost, and all those excellent peripherals just thrown in for free?
My mpc823 port is working now, and about to be installed for a
customer. There are undoubtedly bugs, and it is a bit inelegant. But
it works -- especially the serial, which is truly dynamite. I'm
waiting for gcc 3.3 and a few other things before posting it.