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Re: port-newsmips/53626: NetBSD/newsmips 8.0 GENERIC boot fails on NWS-5000X



The following reply was made to PR port-newsmips/53626; it has been noted by GNATS.

From: Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>
To: gnats-bugs%NetBSD.org@localhost
Cc: tsutsui%ceres.dti.ne.jp@localhost
Subject: Re: port-newsmips/53626: NetBSD/newsmips 8.0 GENERIC boot fails on
	 NWS-5000X
Date: Sat, 22 Sep 2018 22:18:49 +0900

 There was a special handling for PROM work area used by
 news5000 (newsmips + MIPS3) in NetBSD 5.x and prior:
 
  https://nxr.netbsd.org/xref/src/sys/arch/mips/mips/mipsX_subr.S?r=1.26.30.1#1531
 ---
    1531 #ifdef newsmips
    1532 	/* news5000 has ROM work area at 0xfff00000. */
    1533 	bne	k1, zero, 1f
    1534 	nop
    1535 	j	checkromwork
    1536 	nop					# - delay slot -
    1537 1:
    1538 #else
    1539 	beq	k1, zero, outofworld		# No. Failing beyond. . .
    1540 	nop					# - delay slot -
    1541 #endif
 ---
 
  https://nxr.netbsd.org/xref/src/sys/arch/newsmips/newsmips/locore_machdep.S?r=1.15#81
 ---
      81 #ifdef MIPS3
      82 	.set	mips3
      83 	.set	noat
      84 	.globl	checkromwork
      85 checkromwork:
      86 	dmfc0	k0, MIPS_COP_0_BAD_VADDR
      87 
      88 	li	k1, 0xfff00000			# NEWS5000 ROM Work: 0xFFF00000~0xFFFFFFFF (1Mbyte)
      89 	sltu	k1, k0, k1
      90 	bne	k1, zero, outofworld
      91 	nop
      92 
      93 	li	k1, 0x000fe000			# XXX (depend on 4k page)
      94 	and	k1, k0, k1			# k1 = (VADDR - 0xFFF00000) & 0xffffe000
      95 
      96 	la	k0, _C_LABEL(physmem)
      97 	lw	k0, 0(k0)			# k0 = page of physmem (tail of maxmemory - 0x00100000)
      98 	sll	k0, k0, PGSHIFT			# k0 = memory tail
      99 	add	k0, k0, k1			# 0xfff00000+? -> memory tail + ?
     100 
     101 	srl	k0, k0, 6			# MIPS3_PG_SHIFT
     102 	li	k1, 0x02|0x18|0x01		# MIPS3_PG_V|MIPS3_PG_CACHED|MIPS3_PG_G
     103 	or	k0, k0, k1
     104 
     105 	li	k1, 64				# set ODD page
     106 	add	k1, k0, k1
     107 
     108 	dsll	k0, k0, 34			# get rid of "wired" bit
     109 	dsrl	k0, k0, 34
     110 	dmtc0	k0, MIPS_COP_0_TLB_LO0		# load PTE entry
     111 	dsll	k1, k1, 34
     112 	dsrl	k1, k1, 34
     113 	dmtc0	k1, MIPS_COP_0_TLB_LO1		# load PTE entry
     114 	nop
     115 	nop					# required for QED5230
     116 	tlbwr					# write TLB
     117 	nop
     118 	nop
     119 	nop
     120 	nop
     121 	nop
     122 	eret
 ---
 
 It looks we should map the last 1MB of physical RAM to
 KSEG2 0xFFF00000 - 0xFFFFFFFF somewhere.
 
 ---
 Izumi Tsutsui
 


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