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port-macppc/51495: ppc601 won't boot off the hard disk
>Number: 51495
>Category: port-macppc
>Synopsis: ppc601 won't boot off the hard disk
>Confidential: no
>Severity: serious
>Priority: medium
>Responsible: port-macppc-maintainer
>State: open
>Class: sw-bug
>Submitter-Id: net
>Arrival-Date: Wed Sep 21 19:40:00 +0000 2016
>Originator: scole_mail
>Release: 7.0.1 or current from today
>Organization:
none
>Environment:
NetBSD pmac 6.99.31 NetBSD 6.99.31 (GENERIC-$Revision: 1.311 $) #41: Sat Feb 15 19:12:03 MST 2014
>Description:
This is a continuation from http://gnats.netbsd.org/48600 . I'm making a new PR for this specific issue because the original is too long and convoluted, and most of it has already been checked in already.
Basically, the 601 can't boot off the hard disk because of its unique bat setup and having operands crossing page boundaries will cause alignment exceptions
I don't have machines to test this anymore, but the ofwboot.xcf changes I've included below worked on a powermac 7200 at one time. To be safe, these should be tested on both 601 and non-601macppc machines.
I am not sure, but the cmpi instructios in
sys/arch/macppc/stand/ofwboot/Locore.c
sys/arch/macppc/stand/bootxx/bootxx.c
may need to be
cmpi 0, 0, ..., ...
instead of
cmpi 0, 1, ..., ...
I know the "comp 0,1,..." worked on my 601 and an old 601 manual I have
says the 601 will ignore the L (sign extend 64bits) field. But I just
read in other places which say L=1 is an invalid instruction for 32
implementations.
I think the Locore.c patch is already checked in.
>How-To-Repeat:
Boot off a hard disk with a 601 cpu
>Fix:
Here are 2 patches that test for 601 to set up bats, and use byte operations to avoid alignment exceptions.
Summary of changes: (A/? = New, R/D = Removed, M = Modified)
=============================================================
M bootxx/bootxx.c
M ofwboot/Locore.c
Apply patch with "cd .../src/sys/arch/macppc/stand ; patch -s -p0 < .../patchfile"
Index: bootxx/bootxx.c
===================================================================
RCS file: /cvsroot/src/sys/arch/macppc/stand/bootxx/bootxx.c,v
retrieving revision 1.18
diff -b -u -r1.18 bootxx.c
--- bootxx/bootxx.c 14 Mar 2009 21:04:12 -0000 1.18
+++ bootxx/bootxx.c 21 Sep 2016 19:19:50 -0000
@@ -33,6 +33,7 @@
#include <sys/types.h>
#include <powerpc/oea/bat.h>
+#include <powerpc/oea/spr.h>
#include <sys/bootblock.h>
@@ -76,7 +77,13 @@
" sync \n"
" li %r0,0 \n"
-" mtdbatu 3,%r0 \n"
+" \n" /* test for 601 */
+" mfspr %r9,287 \n" /* mfpvbr %r9 PVR = 287 */
+" srwi %r9,%r9,0x10 \n"
+" cmpi 0,0,%r9,0x02 \n" /* 601 CPU = 0x0001 */
+" blt 2f \n" /* skip over non-601 BAT setup */
+" \n"
+" mtdbatu 3,%r0 \n" /* non-601 BAT */
" mtibatu 3,%r0 \n"
" isync \n"
" li %r8,0x1ffe \n" /* map the lowest 256MB */
@@ -86,13 +93,64 @@
" mtibatl 3,%r9 \n"
" mtibatu 3,%r8 \n"
" isync \n"
+" b 3f \n"
+" \n"
+"2: \n"
+" mfmsr %r8 \n" /* 601 BAT */
+" mtmsr %r0 \n"
+" isync \n"
+" \n"
+" mtibatu 0,%r0 \n"
+" mtibatu 1,%r0 \n"
+" mtibatu 2,%r0 \n"
+" mtibatu 3,%r0 \n"
+" \n"
+" li %r9,0x7f \n"
+" mtibatl 0,%r9 \n"
+" li %r9,0x1a \n"
+" mtibatu 0,%r9 \n"
+" \n"
+" lis %r9,0x80 \n"
+" addi %r9,%r9,0x7f \n"
+" mtibatl 1,%r9 \n"
+" lis %r9,0x80 \n"
+" addi %r9,%r9,0x1a \n"
+" mtibatu 1,%r9 \n"
+" \n"
+" lis %r9,0x100 \n"
+" addi %r9,%r9,0x7f \n"
+" mtibatl 2,%r9 \n"
+" lis %r9,0x100 \n"
+" addi %r9,%r9,0x1a \n"
+" mtibatu 2,%r9 \n"
+" \n"
+" lis %r9,0x180 \n"
+" addi %r9,%r9,0x7f \n"
+" mtibatl 3,%r9 \n"
+" lis %r9,0x180 \n"
+" addi %r9,%r9,0x1a \n"
+" mtibatu 3,%r9 \n"
+" \n"
+" isync \n"
+" \n"
+" mtmsr %r8 \n"
+" isync \n"
+" \n"
/*
* setup 32 KB of stack with 32 bytes overpad (see above)
*/
+"3: \n"
" lis %r1,(stack+32768)@ha\n"
" addi %r1,%r1,(stack+32768)@l\n"
-" stw %r0,0(%r1) \n" /* terminate the frame link chain */
+ /*
+ * terminate the frame link chain,
+ * clear by bytes to avoid ppc601 alignment exceptions
+ */
+" stb %r0,0(%r1) \n"
+" stb %r0,1(%r1) \n"
+" stb %r0,2(%r1) \n"
+" stb %r0,3(%r1) \n"
" b startup \n"
);
@@ -257,6 +315,7 @@
void
startup(int arg1, int arg2, void *openfirm)
{
+ uint32_t pvr;
int fd, blk, chosen, options, j;
size_t i;
char *addr;
@@ -302,6 +361,9 @@
}
putstr(". done!\r\nstarting stage 2...\r\n");
+ __asm volatile ("mfpvr %0" : "=r"(pvr));
+
+ if (pvr != MPC601) {
/*
* enable D/I cache
*/
@@ -313,6 +375,7 @@
"isync"
:: "r"(BATU(0, BAT_BL_256M, BAT_Vs)),
"r"(BATL(0, 0, BAT_PP_RW)));
+ }
entry_point(0, 0, openfirm);
for (;;); /* just in case */
Index: ofwboot/Locore.c
===================================================================
RCS file: /cvsroot/src/sys/arch/macppc/stand/ofwboot/Locore.c,v
retrieving revision 1.29
diff -b -u -r1.29 Locore.c
--- ofwboot/Locore.c 22 Apr 2016 18:25:41 -0000 1.29
+++ ofwboot/Locore.c 21 Sep 2016 19:19:51 -0000
@@ -72,7 +72,7 @@
" \n" /* test for 601 */
" mfspr %r0,287 \n" /* mfpvbr %r0 PVR = 287 */
" srwi %r0,%r0,0x10 \n"
-" cmpi 0,1,%r0,0x02 \n" /* 601 CPU = 0x0001 */
+" cmpi 0,0,%r0,0x02 \n" /* 601 CPU = 0x0001 */
" blt 1f \n" /* skip over non-601 BAT setup */
/* non PPC 601 BATs */
" li %r0,0 \n"
@@ -143,7 +143,13 @@
" \n"
"5: cmpw 0,%r8,%r9 \n"
" bge 6f \n"
-" stw %r0,0(%r8) \n"
+ /*
+ * clear by bytes to avoid ppc601 alignment exceptions
+ */
+" stb %r0,0(%r8) \n"
+" stb %r0,1(%r8) \n"
+" stb %r0,2(%r8) \n"
+" stb %r0,3(%r8) \n"
" addi %r8,%r8,4 \n"
" b 5b \n"
" \n"
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