Re: port-i386/44995

[Nat Sloss <nathanialsloss%yahoo.com.au@localhost>]

The following reply was made to PR port-i386/44995; it has been noted by GNATS.

From: Nat Sloss <nathanialsloss%yahoo.com.au@localhost>
To: gnats-bugs%netbsd.org@localhost
Cc: 
Subject: Re: port-i386/44995
Date: Tue, 18 Dec 2012 13:21:20 +1100

 Hi.
 
 I've found the reason as to why NetBSD-6 PAE i386 kernels crash after applying 
 the patch from this PR.
 
 The reason is that interrupts are enabled, I think they are disabled at 
 initial boot, and checking the interrupt enable flag and then deciding to 
 enable interrupts allowed it to boot, but alas I don't think I've done this 
 properly as it causes the system to lock up within one minute when building.
 
 This is the modified patch that I applied:
 
 Index: src/sys/arch/x86/x86/cpu.c
 ===================================================================
 RCS file: /cvsroot/src/sys/arch/x86/x86/cpu.c,v
 retrieving revision 1.96.8.3
 diff -u -r1.96.8.3 cpu.c
 --- src/sys/arch/x86/x86/cpu.c 5 Jul 2012 17:52:54 -0000       1.96.8.3
 +++ src/sys/arch/x86/x86/cpu.c 18 Dec 2012 02:24:07 -0000
 @@ -1,4 +1,4 @@
 -/*    $NetBSD: cpu.c,v 1.96.8.3 2012/07/05 17:52:54 riz Exp $ */
 +/*    $NetBSD: cpu.c,v 1.100 2012/07/02 01:05:48 chs Exp $    */
  
  /*-
   * Copyright (c) 2000-2012 NetBSD Foundation, Inc.
 @@ -62,7 +62,7 @@
   */
  
  #include <sys/cdefs.h>
 -__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.96.8.3 2012/07/05 17:52:54 riz Exp $");
 +__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.100 2012/07/02 01:05:48 chs Exp $");
  
  #include "opt_ddb.h"
  #include "opt_mpbios.h"               /* for MPDEBUG */
 @@ -1235,16 +1235,23 @@
  cpu_load_pmap(struct pmap *pmap, struct pmap *oldpmap)
  {
  #ifdef PAE
 -      int i, s;
 -      struct cpu_info *ci;
 -
 -      s = splvm(); /* just to be safe */
 -      ci = curcpu();
 +      struct cpu_info *ci = curcpu();
        pd_entry_t *l3_pd = ci->ci_pae_l3_pdir;
 +      int i, intrPrev;
 +
 +      intrPrev = x86_read_flags() & 0x40; 
 +
 +      /*
 +       * disable interrupts to block TLB shootdowns, which can reload cr3.
 +       * while this doesn't block NMIs, it's probably ok as NMIs unlikely
 +       * reload cr3.
 +       */
 +      x86_disable_intr();
        for (i = 0 ; i < PDP_SIZE; i++) {
                l3_pd[i] = pmap->pm_pdirpa[i] | PG_V;
        }
 -      splx(s);
 +      if (intrPrev)
 +              x86_enable_intr();
        tlbflush();
  #else /* PAE */
        lcr3(pmap_pdirpa(pmap, 0));
 
 
 Is there another way apart from reading the IE bit of the flags register to 
 determine whether interrupts should be enabled?
 
 Regards,
 
 Nat.