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Re: port-i386/43189: compiling i386 ALL with "options PERFCTRS" fails



The following reply was made to PR port-i386/43189; it has been noted by GNATS.

From: "Greg A. Woods" <woods%planix.com@localhost>
To: NetBSD GNATS <gnats-bugs%NetBSD.org@localhost>
Cc: jym%netbsd.org@localhost
Subject: Re: port-i386/43189: compiling i386 ALL with "options PERFCTRS" fails
Date: Thu, 22 Apr 2010 13:35:00 -0400

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 One more change is necessary to complete the compile of ALL:
 
 Index: sys/arch/x86/x86/via_padlock.c
 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
 RCS file: /cvs/master/m-NetBSD/main/src/sys/arch/x86/x86/via_padlock.c,v
 retrieving revision 1.12
 diff -u -r1.12 via_padlock.c
 --- sys/arch/x86/x86/via_padlock.c     18 Apr 2010 23:47:51 -0000      1.12
 +++ sys/arch/x86/x86/via_padlock.c     22 Apr 2010 15:39:18 -0000
 @@ -43,6 +43,7 @@
  #include <x86/specialreg.h>
 =20
  #include <machine/cpufunc.h>
 +#include <machine/cpuvar.h>
 =20
  #include <opencrypto/cryptodev.h>
  #include <opencrypto/cryptosoft.h>
 
 
 The earlier breakage seems as if it may be some kind of fallout from
 this change, and perhaps there's also a related change where a
 declaration was (re)moved requiring the above change too?
 
 RCS file: /cvs/master/m-NetBSD/main/src/sys/arch/x86/include/cpuvar.h,v
 Working file: x86/include/cpuvar.h
 ----------------------------
 revision 1.32
 date: 2010/04/18 23:47:51;  author: jym;  state: Exp;  lines: +3 -1
 This patch fixes the NX regression issue observed on amd64 kernels, where
 per-page execution right was disabled (therefore leading to the inability
 of the kernel to detect fraudulent use of memory mappings marked as not
 being executable).
 
 - replace cpu_feature and ci_feature_flags variables by cpu_feature and
 ci_feat_val arrays. This makes it cleaner and brings kernel code closer
 to the design of cpuctl(8). A warning will be raised for each CPU that
 does not expose the same features as the Boot Processor (BP).
 [[...]]
 
 
 --=20
                                                Greg A. Woods
 
 +1 416 218-0098                VE3TCP          RoboHack 
<woods%robohack.ca@localhost>
 Planix, Inc. <woods%planix.com@localhost>      Secrets of the Weird 
<woods%weird.com@localhost>
 
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