Re: kern/38684: zstty(4) freezes without LOCKDEBUG

[Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>]

The following reply was made to PR kern/38684; it has been noted by GNATS.

From: Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>
To: gnats-bugs%NetBSD.org@localhost, isaki%pastel-flower.jp@localhost
Cc: kern-bug-people%NetBSD.org@localhost, gnats-admin%NetBSD.org@localhost, 
netbsd-bugs%NetBSD.org@localhost,
        tsutsui%ceres.dti.ne.jp@localhost
Subject: Re: kern/38684: zstty(4) freezes without LOCKDEBUG
Date: Tue, 20 May 2008 01:45:30 +0900

 > Boot GENERIC on x68k.
 
 IPL_SERIAL (which is defined as IPL_HIGH) is not initialized?
 
 (BTW, which ipl does zs use? 4 or 5?)
 ---
 
 
 Index: include/intr.h
 ===================================================================
 RCS file: /cvsroot/src/sys/arch/x68k/include/intr.h,v
 retrieving revision 1.18
 diff -u -r1.18 intr.h
 --- include/intr.h     28 Apr 2008 20:23:40 -0000      1.18
 +++ include/intr.h     19 May 2008 16:37:34 -0000
 @@ -41,7 +41,7 @@
  #define splsoftclock()        splraise1()
  #define splsoftnet()  splraise1()
  #define splsoftserial()       splraise1()
 -#define splvm()         splraise4()
 +#define splvm()         splraise5()
  #define splsched()      spl7()
  #define splhigh()       spl7()
  
 @@ -57,7 +57,7 @@
  #define       IPL_SOFTNET     3
  #define       IPL_SOFTSERIAL  4
  #define       IPL_VM          5
 -#define       IPL_SCHED       5
 +#define       IPL_SCHED       6
  #define       IPL_HIGH        6
  #define       NIPL            7
  
 Index: x68k/machdep.c
 ===================================================================
 RCS file: /cvsroot/src/sys/arch/x68k/x68k/machdep.c,v
 retrieving revision 1.146
 diff -u -r1.146 machdep.c
 --- x68k/machdep.c     3 Dec 2007 15:34:26 -0000       1.146
 +++ x68k/machdep.c     19 May 2008 16:37:34 -0000
 @@ -915,8 +915,8 @@
        [IPL_SOFTCLOCK]  = PSL_IPL1,
        [IPL_SOFTNET]    = PSL_IPL1,
        [IPL_SOFTSERIAL] = PSL_IPL1,
 -      [IPL_VM]         = PSL_IPL4,
 -      [IPL_SCHED]      = PSL_IPL6,
 +      [IPL_VM]         = PSL_IPL5,
 +      [IPL_SCHED]      = PSL_IPL7,
  };
  
  ipl_cookie_t