alanh@fairlite.demon.co.uk wrote:

> >Synopsis:       NetBSD 3.1 doesn't boot on Atari Falcon

How about this one?
http://www.ceres.dti.ne.jp/~tsutsui/netbsd/netbsd-atari-BOOTX-3.1.gz


Index: wdc_mb.c
===================================================================
RCS file: /cvsroot/src/sys/arch/atari/dev/wdc_mb.c,v
retrieving revision 1.24
diff -u -r1.24 wdc_mb.c
--- wdc_mb.c	20 Aug 2004 06:39:38 -0000	1.24
+++ wdc_mb.c	3 Dec 2007 14:03:03 -0000
@@ -60,6 +60,11 @@
 #include <atari/dev/ym2149reg.h>
 #include <atari/atari/device.h>
 
+/* Falcon IDE register locations (base and offsets). */
+#define FALCON_WD_BASE	0xfff00000
+#define FALCON_WD_LEN	0x40
+#define FALCON_WD_AUX	0x38
+
 /*
  * XXX This code currently doesn't even try to allow 32-bit data port use.
  */
@@ -95,7 +100,7 @@
 	struct ata_channel ch;
 	struct wdc_softc wdc;
 	struct wdc_regs wdr;
-	int	result = 0;
+	int	result = 0, i;
 	u_char	sv_ierb;
 
 	if ((machineid & ATARI_TT) || strcmp("wdc", aux) || wdc_matched)
@@ -111,14 +116,22 @@
 	wdr.cmd_iot = wdr.ctl_iot = mb_alloc_bus_space_tag();
 	if (wdr.cmd_iot == NULL)
 		return 0;
-	wdr.cmd_iot->stride = 2;
+	wdr.cmd_iot->stride = 0;
 	wdr.cmd_iot->wo_1   = 1;
 
-	if (bus_space_map(wdr.cmd_iot, 0xfff00000, 0x40, 0, &wdr.cmd_baseioh))
-		return 0;
-	if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, 0x38, 1,
+	if (bus_space_map(wdr.cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0,
+	    &wdr.cmd_baseioh))
+		goto out;
+	for (i = 0; i < WDC_NREG; i++) {
+		if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh,
+		    i * 4, 4, &wdr.cmd_iohs[i]) != 0)
+			goto outunmap;
+	}
+	wdc_init_shadow_regs(&ch);
+
+	if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_AUX, 4,
 	    &wdr.ctl_ioh))
-		return 0;
+		goto outunmap;
 
 	/*
 	 * Make sure IDE interrupts are disabled during probing.
@@ -136,7 +149,9 @@
 
 	MFP->mf_ierb = sv_ierb;
 
-	bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, 0x40);
+ outunmap:
+	bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_LEN);
+ out:
 	mb_free_bus_space_tag(wdr.cmd_iot);
 
 	if (result)
@@ -151,25 +166,37 @@
 {
 	struct wdc_mb_softc *sc = (void *)self;
 	struct wdc_regs *wdr;
+	int i;
 
 	printf("\n");
 
 	sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
 	wdr->cmd_iot = wdr->ctl_iot =
 	    mb_alloc_bus_space_tag();
-	wdr->cmd_iot->stride = 2;
+	wdr->cmd_iot->stride = 0;
 	wdr->cmd_iot->wo_1   = 1;
 	wdr->cmd_iot->abs_rms_2 = read_multi_2_swap;
 	wdr->cmd_iot->abs_wms_2 = write_multi_2_swap;
-	if (bus_space_map(wdr->cmd_iot, 0xfff00000, 0x40, 0,
+	if (bus_space_map(wdr->cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0,
 			  &wdr->cmd_baseioh)) {
 		printf("%s: couldn't map registers\n",
 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
 		return;
 	}
+	for (i = 0; i < WDC_NREG; i++) {
+		if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
+		    i * 4, 4, &wdr->cmd_iohs[i]) != 0) {
+			bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
+			    FALCON_WD_LEN);
+			return;
+		}
+	}
+
 	if (bus_space_subregion(wdr->cmd_iot,
-	    wdr->cmd_baseioh, 0x38, 1, &wdr->ctl_ioh))
+	    wdr->cmd_baseioh, FALCON_WD_AUX, 4, &wdr->ctl_ioh)) {
+		bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, FALCON_WD_LEN);
 		return;
+	}
 
 	/*
 	 * Play a nasty trick here. Normally we only manipulate the
@@ -189,6 +216,7 @@
 	sc->sc_channel.ch_channel = 0;
 	sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
 	sc->sc_channel.ch_queue = &sc->sc_chqueue;
+	wdc_init_shadow_regs(&sc->sc_channel);
 
 	/*
 	 * Setup & enable disk related interrupts.

---
Izumi Tsutsui