>Number:         36772
>Category:       bin
>Synopsis:       teach atactl identify about sata
>Confidential:   no
>Severity:       non-critical
>Priority:       medium
>Responsible:    bin-bug-people
>State:          open
>Class:          change-request
>Submitter-Id:   net
>Arrival-Date:   Sat Aug 11 17:30:00 +0000 2007
>Originator:     Jonathan A. Kollasch
>Release:        NetBSD 4.99.22
>Organization:
>Environment:
	
	
System: NetBSD siwenna.kollasch.net 4.99.22 NetBSD 4.99.22 (SIWENNA_HEAD) #13: Sat Aug 4 04:22:23 UTC 2007 root@siwenna.kollasch.net:/usr/src/sys/arch/i386/compile/SIWENNA_HEAD i386
Architecture: i386
Machine: i386
>Description:
atactl's identify sub-command does not decode SATA-related bits
>How-To-Repeat:
run atactl identify on sata drive, notice that things like NCQ
abilities are not reported.
>Fix:

* use full 5-bit command queue depth that SATA supports
* decode SATA bits


Index: sbin/atactl/atactl.c
===================================================================
--- sbin/atactl/atactl.c	(revision 3)
+++ sbin/atactl/atactl.c	(working copy)
@@ -235,6 +235,24 @@
 	{ 0, NULL },
 };
 
+struct bitinfo ata_sata_caps[] = {
+	{ SATA_SIGNAL_GEN1, "1.5Gb/s signaling" },
+	{ SATA_SIGNAL_GEN2, "3.0Gb/s signaling" },
+	{ SATA_NATIVE_CMDQ, "Native Command Queuing" },
+	{ SATA_HOST_PWR_MGMT, "Host-Initiated Interface Power Management" },
+	{ SATA_PHY_EVNT_CNT, "PHY Event Counters" },
+	{ 0, NULL },
+};
+
+struct bitinfo ata_sata_feat[] = {
+	{ SATA_NONZERO_OFFSETS, "Non-zero Offset DMA" },
+	{ SATA_DMA_SETUP_AUTO, "DMA Setup Auto Activate" },
+	{ SATA_DRIVE_PWR_MGMT, "Device-Initiated Interface Power Managment" },
+	{ SATA_IN_ORDER_DATA, "In-order Data Delivery" },
+	{ SATA_SW_STTNGS_PRS, "Software Settings Perservation" },
+	{ 0, NULL },
+};
+
 static const struct {
 	const int	id;
 	const char	*name;
@@ -886,7 +904,7 @@
 
 	if (inqbuf->atap_queuedepth & WDC_QUEUE_DEPTH_MASK)
 		printf("Device supports command queue depth of %d\n",
-		       inqbuf->atap_queuedepth & 0xf);
+		       inqbuf->atap_queuedepth & WDC_QUEUE_DEPTH_MASK);
 
 	printf("Device capabilities:\n");
 	print_bitinfo("\t", "\n", inqbuf->atap_capabilities1, ata_caps);
@@ -917,6 +935,19 @@
 			    ata_cmd_ext);
 	}
 
+	if (inqbuf->atap_sata_caps != 0 && inqbuf->atap_sata_caps != 0xffff) {
+		printf("Serial ATA capabilities:\n");
+		print_bitinfo("\t", "\n", inqbuf->atap_sata_caps, ata_sata_caps);
+	}
+
+	if (inqbuf->atap_sata_features_supp != 0 && inqbuf->atap_sata_features_supp != 0xffff) {
+		printf("Serial ATA features:\n");
+		if (inqbuf->atap_sata_features_en != 0 && inqbuf->atap_sata_features_en != 0xffff)
+			print_bitinfo2("\t", "\n", inqbuf->atap_sata_features_supp, inqbuf->atap_sata_features_en, ata_sata_feat);
+		else
+			print_bitinfo("\t", "\n", inqbuf->atap_sata_features_supp, ata_sata_feat);
+	}
+
 	return;
 }
 
Index: sys/dev/ata/atareg.h
===================================================================
--- sys/dev/ata/atareg.h	(revision 3)
+++ sys/dev/ata/atareg.h	(working copy)
@@ -350,17 +350,20 @@
     u_int16_t	atap_pkt_bsyclr;	/* 72: tme to clear BSY after service */
     u_int16_t	__reserved4[2];
     u_int16_t	atap_queuedepth;   	/* 75: */
-#define WDC_QUEUE_DEPTH_MASK 0x0F
+#define WDC_QUEUE_DEPTH_MASK 0x1F
     u_int16_t   atap_sata_caps;/* 76: */
 #define SATA_SIGNAL_GEN1	0x02
 #define SATA_SIGNAL_GEN2	0x04
 #define SATA_NATIVE_CMDQ	0x0100
 #define SATA_HOST_PWR_MGMT	0x0200
+#define SATA_PHY_EVNT_CNT	0x0400
     u_int16_t   atap_sata_reserved;    /* 77: */
     u_int16_t   atap_sata_features_supp;    /* 78: */
 #define SATA_NONZERO_OFFSETS	0x02
 #define SATA_DMA_SETUP_AUTO	0x04
 #define SATA_DRIVE_PWR_MGMT	0x08
+#define SATA_IN_ORDER_DATA	0x10
+#define SATA_SW_STTNGS_PRS	0x40
     u_int16_t   atap_sata_features_en;    /* 79: */
     u_int16_t	atap_ata_major;  	/* 80: Major version number */
 #define	WDC_VER_ATA1	0x0002

>Unformatted: