ndehne@gmail.com wrote:

> >Fix:
> Yes, please.

How about the attached patch (taken from FreeBSD)?
---
Izumi Tsutsui


Index: sys/dev/ic/rtl81x9.c
===================================================================
RCS file: /cvsroot/src/sys/dev/ic/rtl81x9.c,v
retrieving revision 1.68
diff -u -r1.68 rtl81x9.c
--- sys/dev/ic/rtl81x9.c	4 Feb 2007 06:01:30 -0000	1.68
+++ sys/dev/ic/rtl81x9.c	9 Feb 2007 12:05:46 -0000
@@ -539,7 +539,7 @@
 {
 	struct ifnet *ifp;
 	uint32_t hashes[2] = { 0, 0 };
-	uint32_t rxfilt;
+	uint32_t rxfilt, hwrev;
 	struct ether_multi *enm;
 	struct ether_multistep step;
 	int h, mcnt;
@@ -587,8 +587,22 @@
 		rxfilt &= ~RTK_RXCFG_RX_MULTI;
 
 	CSR_WRITE_4(sc, RTK_RXCFG, rxfilt);
-	CSR_WRITE_4(sc, RTK_MAR0, hashes[0]);
-	CSR_WRITE_4(sc, RTK_MAR4, hashes[1]);
+
+	/*
+	 * For some unfathomable reason, RealTek decided to reverse
+	 * the order of the multicast hash registers in the PCI Express
+	 * parts. This means we have to write the hash pattern in reverse
+	 * order for those devices.
+	 */
+	hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
+	if (hwrev == RTK_HWREV_8100E || hwrev == RTK_HWREV_8101E ||
+	    hwrev == RTK_HWREV_8168_SPIN1 || hwrev == RTK_HWREV_8168_SPIN2) {
+		CSR_WRITE_4(sc, RTK_MAR0, bswap32(hashes[1]));
+		CSR_WRITE_4(sc, RTK_MAR4, bswap32(hashes[0]));
+	} else {
+		CSR_WRITE_4(sc, RTK_MAR0, hashes[0]);
+		CSR_WRITE_4(sc, RTK_MAR4, hashes[1]);
+	}
 }
 
 void