Subject: Re: kern/34045: ath0 not working on Lenovo T60 laptop under -current: pci_mem_find problems
To: None <gnats-bugs@NetBSD.org>
From: Brian de Alwis <bsd@cs.ubc.ca>
List: netbsd-bugs
Date: 07/21/2006 15:19:22
>  Can you provide that output of "pcictl dump" for your ath device?

Here you go:

$ pcictl pci3 dump -d 0
PCI configuration registers:
  Common header:
    0x00: 0x1014168c 0x00100107 0x02000001 0x00000010

    Vendor Name: Atheros Communications (0x168c)
    Device ID: 0x1014
    Command register: 0x0107
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): on
      Fast back-to-back transactions: off
    Status register: 0x0010
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: fast (0x0)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: network (0x02)
    Subclass Name: ethernet (0x00)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x00
    Cache Line Size: 0x10

  Type 0 ("normal" device) header:
    0x10: 0xedf00004 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00005001 0x058a1014
    0x30: 0x00000000 0x00000040 0x00000000 0x0000010b

    Base address register at 0x10
      type: 64-bit nonprefetchable memory
      base: 0x00000000edf00000, not sized
    Base address register at 0x18
      not implemented(?)
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00005001
    Subsystem vendor ID: 0x1014
    Subsystem ID: 0x058a
    Expansion ROM Base Address: 0x00000000
    Capability list pointer: 0x40
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x0b

  Capability register at 0x40
    type: 0x01 (Power Management, rev. 1.0)
  Capability register at 0x50
    type: 0x05 (MSI)
  Capability register at 0x60
    type: 0x10 (PCI Express)
  Capability register at 0x90
    type: 0x11 (MSI-X)

  Device-dependent header:
    0x40: 0x01c25001 0x00000000 0x00000000 0x00000000
    0x50: 0x00006005 0x00000000 0x00000000 0x00000000
    0x60: 0x00119010 0x05040cc0 0x000a2010 0x00033c11
    0x70: 0x10110048 0x00000000 0x000003c0 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000011 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000004 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

-- 
  Brian de Alwis | Software Practices Lab | UBC | http://www.cs.ubc.ca/~bsd/
      "Amusement to an observing mind is study." - Benjamin Disraeli